Sanctuary Beach Resort Hotel,
Thursday, Nov 4,
Friday, Nov 5,
Friday, Nov 5, morning: The Real Deal with 3D : Chaired by
Mark Horowitz, Stanford
8:30- 9:15 Dinesh Somaskhar, Intel
“Architecture and
Design of 3D IC’s”
9:15 – 10:00 Phil Emma,
11:15 – 11:45 3D Panel and open discussion
Friday, Nov 5,
Lunch Keynote: Mark Horowitz, Stanford
“Why Design Must Change”
Friday, Nov 5, afternoon:
Looking Beyond EDA: Chaired
by William H. Joyner, SRC
2:15 – 2:55 Michael Flynn, Stanford / Maxeler “Automating
the Acceleration
of Very Large Applications”
Friday, Nov 5,
Dinner Keynote: Anirudh Devgan, Analog-Mixed
Signal: The Next EDA Frontier
Saturday, Nov 6,
Saturday, Nov 6, morning:
Automatic Security: Chaired
by Farinaz Koushanfar
10:20 – 10:50 Morning break
Saturday, Nov 6,
Technical Session Details
The Real Deal with 3D
Dinesh Somaskhar,
Intel
“Architecture and Design of 3D IC’s”
3D stacking is a key enabler
for allowing
dissimilar process technologies to be in close physical proximity. It is often viewed as a solution for the
problem of high band-width, low latency -- high data-rate and high
interconnection count -- between memory devices and processors. In this space it allows for the most
cost-effective solution by leveraging the low cost of a memory process
without
burdening it with high performance device requirements.
While research has often focused on technical
challenges of implementing the die stack, namely thermals, die-stackup
(memory
on top, logic on top) and the technology used for implementing TSVs,
less
mention is found of the design challenges imposed by perforating a die
with
TSVs. This talk presents a case study of a stacked 3D chip
in 65nm which implements a high bandwidth
processor memory stackup. It highlights particular issues and solutions
developed with reference to micro-architecture of the overall processor
memory
hierarchy, power distribution, physical design implications and test.
The
emphasis of the talk being to highlight the non-trivial design issues
imposed
by the introduction of TSV perforation on a large logic die.
Dinesh
Somasekhar received the B.E. degree in EE from the Maharaja
Sayajirao University Baroda in 1989, the M.E degree in from the Indian
Institute of Science
Phil Emma,
"3D" is
generically used to describe many
kinds of structures; some having immediate value in certain markets,
but many
being of dubiousvalue and/or having real difficulties. We explore this
space
and make suggestions as to what needs to happen to reap real potential
in 3D
for high-end markets.
Dr.
Philip Emma received his PhD degree in EE from
Igor Markov,
As semiconductor scaling laws run into gale
force
headwinds, 3D die stacking promises to continue increasing silicon
integration
levels. We will show that most of the academic research in 3D EDA has
been
misguided, leaving interesting challenges free for the taking.
Bio: Igor
L. Markov is an associate
professor of Electrical Engineering and Computer Science at the
Lunch Keynote: Mark
Horowitz, Stanford, Why Design Must Change
The slowing performance gains
from
Synthesis and placement/routing
systems
created the ASIC market, and we need a similar scale improvement today.
For
many reasons I don't believe that either the current SoC, or high-level
language effort will succeed in solving this problem.
Instead, we should acknowledge that working
out the interactions in a complex design is complex, and will cost a
lot of
money, even when we do it well. The key
is to leverage this work over a broader class of chips. This approach
leads to
the idea of building chip-generators and not chips. That is instead of
building
a programmable chip to meet a broad class of application needs, you
create a
virtual programmable chip, that is MUCH more flexible than any real
chip. The application designer (the new
chip
designer) will then configure this substrate to optimize their
application. The generator will take this
information and then create the desired chip.
While there are many very hard problems that need to be
addressed to
make this work, but none of them seem insurmountable.
In fact I will provide some recent examples
from my group which indicate the promise of this approach – including
improving
the energy efficiency of a H.264 encoder by 200x, and how to validate a
chip
generator.
Mark
Horowitz is the Chair of the
Electrical Engineering Department and the Yahoo! Founders Professor at
Looking Beyond EDA
Frank
Liu,
EDA
is about how to make better or cheaper semiconductor chips. However,
the
techniques can also be applied to other problems which are becoming
more
important to the society. In this presentation, I will talk about how
to use
EDA methods to simulate dynamic river systems, which is our closest
source of
fresh water.
Bio:
Frank Liu is a Research Staff Member at
Michael Flynn,
Stanford /
Maxeler, “Automating the acceleration of very large applications”
Very
large applications can be accelerated by building
customized synchronous data flow machines with FPGAs. We discuss
the
theory, tools and limitations of this approach as well as some quite
promising
results.
Michael
Flynn
has had a long career in computer architecture and design; starting
with
early
Tim
Kraska,
Berkeley “The Potential of Cloud Computing: Challenges, Opportunities,
Impact”
Cloud computing opens up access
to large
computing resources for medium-sized companies, small startups, and
even
private persons. As a consequence, cloud computing rapidly changes the
IT
infrastructure landscape. This talk gives a brief overview of the
opportunities
and challenges which come with the rise of cloud computing as well as
the
impact it has on programming models and systems from a user
perspective.
Tim Kraska is a PostDoc in the
Jason
Lohn, CMU
“Antenna Design Automation”
Current methods of designing
and
optimizing antennas by hand are time and labor intensive, limit
complexity, and
require significant expertise and experience.
Stochastic search algorithms can overcome these limitations by
automatically searching the design space and finding effective
solutions that
are closer to limits imposed by physics.
For example, our algorithms have discovered antenna designs that
have
wide impedance bandwidth, are electrically small, highly efficient, and
compare
well in terms of size, weight, and cost. While optimization modules are
commonly available in commercial antenna CAD tools, they are typically
simple
parametric methods, and no system yet offers an antenna synthesis
capability. We discuss the antenna
synthesis system we are developing and its use in a variety of
applications,
focusing on a project that produced antennas that flew in space on
NASA's Space
Technology 5 (ST5) mission.
Jason Lohn is an Associate Research Professor at Carnegie Mellon
Silicon
Valley. Previously he led Evolvable
Systems research at
Takahide Inoue,
Berkeley /
CITRIS "Opinion Space: Looking Beyond EDA/
Semiconductor"
Consistent
and swearing efforts of semiconductor/EDA
community more than 4 decades have developed many innovative IT based
services
especially last ten years. Now it may be good time for us to get
benefit from
new favorite such as Social Media since we are in hard time to find our
lives
in Beyond Semiconductor/EDA era. Social Media has tremendous potential
for
innovation and problem solving, but existing tools such as blogs,
Twitter,
wikis, can be quickly overwhelmed by the volume of responses and
extreme
viewpoints. “Opinion Space” is a new social media technology designed
to help communities
exchange ideas and suggestions about the issues, policies, and products
they
are passionate about. Opinion Space
incorporates techniques from deliberative polling, collaborative
filtering, and
multidimensional visualization and introduces an intuitive graphical
"map" that displays activity, patterns, trends, and insights as they
emerge. A version of “Opinion Space” is being used by the
Takahide
Inoue is a long time advocate of EECS at
Dinner
Keynote: Anirudh Devgan, Magma, Analog-Mixed Signal: The Next EDA
Frontier
Analog circuits are designed in
fundamentally different ways than their counterparts in the digital
domain.
However, two major trends have made analog and digital circuits mix and
co-exist. First, high-performance analog circuits use digital parts and
vice
versa. Second, the desire for new features, ease of use and reducing
integration
costs brings together more digital, analog and RF circuits in one die.
This
convergence of circuits creates a significant need for analog and
digital
design automation to also unify. Furthermore, the time-to-market
requirements
of current analog, mixed-signal designs requires a fundamentally new
approach
from EDA. In this talk we describe EDA challenges and solutions to this
critical problem. With ongoing commoditization of regular digital EDA
tools,
the real action in EDA is in analog, mixed signal design.
Anirudh
Devgan serves as the General Manager and Corporate Vice President of
Magma’s
Custom Design Business unit. Devgan joined Magma in 2005 and manages
Magma’s
Custom Design Business Unit, responsible for FineSim SPICE and FineSim
Pro
circuit simulation products; SiliconSmart library characterization;
Quartz
Automatic Security
Miodrag Potkonjak,
UCLA, “Impossible
problems caused by simple solutions and simple solutions
for impossible problems”
Is
it possible to design trusted ICs using untrusted tools? How can one
remotely
operate an IC while maintaining the ability to verify that produced
results
were actually created at a particular time and location? How can we
place
designers in complete control of remote IC fabrication? How can
we
prevent reverse engineering of an IC? Surprisingly, a few simple
tricks, often
in conjunction with deep submicron phenomena such as process variation,
rapid
thermal alternations, strong supply voltage dependencies, and aging,
can be
used to solve these and many other impossible security problems in
elegant
ways.We will also discuss hardware Trojans (HTs) that
emerged as a
potentially serious security threat. We summarize current threats and
techniques to detect them then provide two contradictory proofs: one
that any
HT can be easily detected and one that there is an undetectable HT.
Which proof
is correct depends on which assumptions we accept.
Miodrag Potkonjak received his Ph.D. degree in EE and CS from
Robert
Lucas,
X-rays can be used to
non-destructively
create images of the metal features of a modern integrated circuit. Tomographic reconstruction from these images
then yields a three-dimensional representation of the wires and vias,
at a
resolution today of 30 nm. This talk
will describe the state-of-the-art of X-ray microscopy, present recent
work to
automate the process of imaging chips larger than the field of view of
an X-ray
microscope, and then extracting the various layers of the design
Dr.
Robert F. Lucas is the Director of the Computational Sciences Division
of the
This talk
will present a background overview of what is now called the
cyber-physical
systems and present the set of security challenges that are faced by
such
systems. Talk will also identify what challenges are commonly faced as
well as
those that are unique to such systems. While the space of attacks on a
distributed system can be large, we will present the need for new
approaches
and illustrate this with examples from aviation and consensus protocols.
Gang
Despite
its own security and trust problems, hardware
is playing a more and more important role in security. We will briefly
demonstrate many security applications that rely on hardware. Then we
will
focus our discussion on the silicon physical unclonable function with
emphasis
on several practical techniques to improve its hardware utilization.
Gang
Qu
received his Ph.D. in Computer Science from UCLA in 2000 and as been
with the