Welcome to CANDE



CANDE Workshops

Information on previous CANDE Workshops: (attendee information available on the Members webpage)

CANDE 2006, Whistler, B.C., Canada
New laws/cycles for EDA industry; System-level EDA; Open HW; 5-year predictions; IP; Disruptive technologies

CANDE 2005, Santa Cruz, California:
Burning issues in EDA, EDA Startups, Open Source, 5-year predictions, Research Funding

CANDE2004 was canceled.

CANDE 2003, New Mexico
Design/Manufacturing Cost, Programming for Reconfigurable Architectures, Analog/Mixed Signal Design.

CANDE 2002, Anchorage, Alaska
Embedded SW, HW-dependent SW, Asynchronous design, On chip optical interconnect, Design IP

     CANDE 2001, Yellowstone Park, Wyoming:
      Design technology for post-PC systems; 5 year predictions; Brick walls and breakthroughs in EDA

     CANDE 2000, Tahoe City, California:
      System-level specification; Designing for ultra low-power

     CANDE '99, Wickenburg, Arizona:
      Intellectual property; A guided tour of the International Technology Roadmap for Semiconductors; Verification

     CANDE '98, St. Simons Island, Georgia:
      Integrated microsystems: The true Systems-on-Chip; Venture capital's vision of the future of industry; Reconfigurable computing: Niche or Mainstream?

     CANDE '97, Banff, Canada:
      Reduced design cycle time and its impact on tool selection; Deep-submicron and scaling; CAD for software

     CANDE '96, Cabo San Lucas, Mexico:
      Trends in mobile computing; 5 year predictions; VLSI multimedia processors

     CANDE '95, Laguna Beach, California:
      CAD and the National Technology Roadmap for Semiconductors; The IRIDIUM System for Global Personal Communications; Challenges for the Gigachip Age

     CANDE '94, Oxnard, California:
      Beyond traditional IC CAD: Micromechanical systems; Silicon Sorcery: The creation of hyper-communication device; The quest for power (reduction)

     CANDE '93, Breckenridge, Colorado:
      Design of hot and cold chips; Computer-aided drug discovery; How the effects of physical interconnect are changing CAD?

     CANDE '92, Hilton Head Island, South Carolina:
      Hardware/Software Co-design; Is parallel procesing real?; Design reuse: hardware and software

     CANDE '91, San Diego, California:
       High definition system design; 10 year predictions; Multi-chip modules (MCMs)

     CANDE '90, Casa Grande, Arizona:
       Strategies for Sequential Test; What is going on in our industry?; CAD for analog design

     CANDE '89, Natchez, Mississippi:
       High-level synthesis; Design frameworks; Issues in analog CAD

     CANDE '88, Santa Rosa, California:
      Large area chips -- some design considerations; Small devices and modeling limits; Macromodeling

     CANDE '87, Destin, Florida:
      Physical design; Simulation; Performance directed synthesis

     CANDE '86, Austin, Texas:
       Object oriented CAD systems &* Object oriented modeling; Hardware accelerators: Point, General accelerators; Parallel and distributed CAD tools and algorithms; 10 year predictions

     CANDE '85, Apache Junction, Arizona:
      Cellular arrays; Silicon compilers; Expert systems; Strategic view of CAE industry

     CANDE '84, Pine Mountain, Georgia:
      Language environment for system design; Experiences with hierarchical design methods; Are engineering workstations a passing fad?; Analog CAD

     CANDE '83, Riodoso, New Mexico:
      Design workstations and implementation systems; Hierarchical design and Hardware Description Language; Knowledge-based systems; Specialized hardware for CAD

     CANDE '82, Not Held (moved to April)

     CANDE '81, Gravenhurst, Canada:
      New directions in digital test generation; Trends in IC design methodologies; The IC Design Lab of 1985; Multilevel simulation -- Where It's At?

     CANDE '80, Fallen Leaf Lake, California:
      Databases for VLSI; Testing -- Before, Dueing and After Design; Process & Device simlation for IC process design; Physical design automation and verification

     CANDE '79, Champion, Pennsylvania: 
      Electrical level simulation of integrated circuits; The use of high-level languages for IC design; Sensitivities pave the way from breadboard to PCBs

     CANDE '78, Mt. Hood, Oregon:
      Status of integrated IC design aids; Aids for designing testable digital LSI circuits; IC design verification

     CANDE '77, Long Branch, New Jersey:
       IC Design techniques; Layout and routing: Theory and technicques; System aspects of CAD

     CANDE '76, St. Charles, Illinois:
       Integrated set of design tools for electronic systems; Statistical modeling; Present status and future trends in CAD

     CANDE '75, Santa Fe, New Mexico:
       Logic Simulation and Fault Modeling; The Human Interface in Computing; IC Design Using Interactive Graphics; Problems and Possibilities in IIL Modeling

     CANDE '74, Kennebunkport, Maine:
       MacroModeling, Statistical Analysis-Alternatives to Monte Carlo; Tolerance Assignment

     CANDE '72, Montreal, Canada:
      Modeling 1 & 2; Simulator-Model Interface