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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

November 16, 2017

10th MOS-AK Compact Modeling Workshop in the Silicon Valley

by @ 7:20 pm. Filed under ALL, Electronics Design
 

Wednesday, December 6, 2017 
SFBA Electron Devices Society (EDS) 
Subject: 10th MOS-AK Compact Modeling Workshop in the Silicon Valley
– frontiers of the compact modeling for nm-scale MEMS designs and CMOS/SOI circuit simulations, compact/SPICE modeling and its Verilog-A standardization, physical, analytical and numerical models… 
Speaker: Wladek Grabinski 
Time: 
Cost: 
Location: Cadence Design Systems, 2655 Seely Ave, Building 5, San Jose 
Event Details: http://www.mos-ak.org/silicon_valley_2017 

20171206ALL

2D Electronics – Opportunities and Challenges

by @ 7:17 pm. Filed under ALL, Electronics Design
 

Friday, December 8, 2017 
SFBA Electron Devices Society (EDS) 
Subject: 2D Electronics – Opportunities and Challenges
– 2D materials are introduced and the potential of 2D transistors is assessed, material properties – bandgap and mobility – are examined in detail and the mobility-bandgap tradeoff… 
Speaker: Prof. Frank Schwierz, TU Ilmenau 
Time: 4:00 pm 
Cost: 
Location: Stanford University, Packard Building 101 
Event Details: http://sites.ieee.org/scv-eds/ 

20171218ALL

November 6, 2017

Recent Developments in Transceiver SoC Design for Next Generation Optical Networks

by @ 7:44 pm. Filed under ALL, Electronics Design, Semiconductors
 

Friday, December 1, 2017 
SCV Solid State Circuits Society (SSCS)
Subject: Recent Developments in Transceiver SoC Design for Next Generation Optical Networks
– high-speed point-to-point reciprocal wireless optical link is necessary to support this hybrid network in radio backhaul and fiber fronthaul, RF-over-Fiber (RoF) and Baseband-over-Fiber (BoF)…
Speaker: Prof. Patrick Yue, HKUST 
Time: 6:00 pm: Networking, registration, and refreshments; 6:30 pm to 8 pm: Presentation
Cost: Free; donation is accepted for refreshments (FREE SSCS members/$2 IEEE members/$5 non-members, pay online or at the door)
Location: Texas Instruments Building E Conference Center, 2900 Semiconductor Dr, Santa Clara 
Event Details: http://sites.ieee.org/scv-sscs/ 

20171201ALL

August 1, 2017

Recent Progress in Memory Technology Reliability 

by @ 4:17 pm. Filed under ALL, Electronics Design, Semiconductors
 

Tuesday, August 8, 2017 
SCV Electron Device Society (EDS) 
Subject: Recent Progress in Memory Technology Reliability 
– novel materials and integration schemes from the cell to the packaging level, reliability failure modes associated with these materials and processes, DRAM, NAND, and emerging memories … 
Speaker: Dr. Bob Gleixner, Micron Technology Inc. 
Time: 6:00 pm to 6:15 pm: Networking with food and refreshments; 6:15 pm to 7 pm: Presentation
Cost: Free 
Location: Texas Instruments Building E Conference Center, 2900 Semiconductor Dr, Santa Clara 
Event Details: http://sites.ieee.org/scv-eds/ 

20170808ALL

July 7, 2017

PCB WEST

by @ 3:58 pm. Filed under ALL, Circuits, Computers/Software, Electronics Design, Semiconductors
 

PCB WEST, the Silicon Valley’s largest event for the PCB supply chain, brings together engineers, designers, fabricators, assemblers and managers to take advantage of unique opportunities to improve skills, increase knowledge and network with peers, colleagues and experts. 

75+ presentations on the hottest topics, including:

PCBWEST* 3D via modeling
* Fine pitch BGA design
* Flex design & parts placement
* Manufacturing IoT PCBs
* Noise control
* Package design
* PCB assembly troubleshooting
* PLUS 100+ exhibitors on the show floor!

 

Register today to attend PCB WEST, https://goo.gl/6f3nnL, at the Santa Clara Convention Center, featuring a three-day conference 9/12 -14 (https://goo.gl/Suu3eT) and a FREE one-day exhibition 9/13 (https://goo.gl/EHAPBu).  Register for the conference by August 14 to receive a $100 discount.

 

20170912ALL

July 5, 2017

Storage Developer Conference (SDC) 2017

by @ 9:11 pm. Filed under ALL, Computers/Software, Electronics Design
 
SDClogoSDC is the destination for technical discussions and education on the latest storage technologies and standards. Spend four days with your peers, and take advantage of this opportunity to learn from the experts all in one place.Topics covered at the conference include:

* Persistent Memory           * Storage Architecture    * Cloud Storage 
* Software and Hardware   * File Systems                  * SMB
* Object Drives                    * Storage Security           * Storage Management

Storage Developer Conference (SDC) 2017 will take place at the Santa Clara Hyatt, Santa Clara, CA on September 11-14, 2017. eGrid subscribers will receive the SNIA Member rate ($200 off of the regular rate) on registration by registering here and using code SDC17IEEEspecial. In addition, register before August 11th and save another $300 with the Early Bird Discount.

 

20170911ALL

April 3, 2017

Asilomar Conference on Signals, Systems, and Computers

by @ 7:32 pm. Filed under ALL, Computers/Software, Electronics Design, Semiconductors
 
 

CALL FOR PAPERS

51st Annual Asilomar Conference on Signals, Systems, and Computers at the Asilomar Hotel and Conference Grounds, Pacific Grove, on October 29 – November 1, 2017

Authors are invited to submit papers on or before May 1st, 2017, in the following areas:
Asilomar* Communications Systems 
* MIMO Communications and Signal Processing 
* Array Signal Processing 
* Biomedical Signal and Image Processing
* Speech, Image and Video Processing 
* Architecture and Implementation 
* Networks; Signal Processing and Adaptive Systems 
For detailed information see Call for Papers

 

20170501ALL

December 30, 2016

18th International Symposium on Quality Electronic Design ISQED 2017

by @ 11:00 pm. Filed under ALL, Computers/Software, Electronics Design, Semiconductors
 

ISQED2017

The 18th International Symposium on Quality Electronic Design ISQED 2017 is the premier interdisciplinary and multidisciplinary Electronic Design conference—bridges the gap among Electronic/Semiconductor ecosystem members providing electronic design tools, integrated circuit technologies, semiconductor technology, packaging, assembly & test to achieve total design quality.

With a theme of Security, IoT and Cyber-Physical systems, the conference will feature nearly 100 papers highlighting the latest trends in electronic circuit and system design & automation, test, verification, and semiconductor technologies

ISQED is being held in Santa Clara on March 15 – 17, 2017.  isqed.org

 

20160315ALL

December 21, 2016

The Technical Impossibilities of Autonomous Driving

by @ 2:14 pm. Filed under ALL, Computers/Software, Consumer Electronics, Electronics Design, Robotics and Automation
 

Tuesday, February 14th, 2017 
SCV Consultants Network of Silicon Valley (CNSV) 
Subject: The Technical Impossibilities of Autonomous Driving 
– engineering overview of autonomous driving, and will describe its greatest technical challenges, companies in this field, skill areas that these companies are searching for … 
Speaker: Dr. Mark J. Nitzberg of Caruma Technologies, Inc.
Time: 7:00 pm: Registration, networking, pizza and drinks; 7:30 pm to 9:00 pm: Presentation 
Cost: Free 
Location: NVIDIA, 2800 Scott Blvd., Building E, Santa Clara 
Event Details: https://californiaconsultants.org/event/the-technical-impossibilities-of-autonomous-driving/ 

20170214ALL

December 7, 2016

Advanced Engineering Courses 2017 at UC Santa Cruz

by @ 3:36 pm. Filed under ALL, Electrical/Power, Electronics Design, Semiconductors
 
ADVANCE YOUR CAREER WITH ADDITIONAL EDUCATION

Advanced Engineering Courses 2017 at UC Santa Cruz
Courses are organized by MEAD Microelectronics and held at UC Santa Cruz from March 27-31, 2017 
MEAD* Advanced Analog and Mixed-Signal Design 
Noise coupling, ESD &EMC, sensor interfaces, circuit design
* Continuous-Time Delta-Sigma Design 
Basics, modulators, dynamic element matching, VCO-based circuit nonlinearities
* Power Management
Converters, regulators, energy harvesting

Deadline for registration: February 20, 2017 
http://mead.ch/MEADNEW/advanced-engineering-courses-uc-santa-cruz-california/

 

20170327ALL

November 29, 2016

International Solid State Circuits Society (ISSCC) 2017 

by @ 1:58 pm. Filed under ALL, BioEngineering, Electronics Design, Semiconductors
 

The International Solid- State Circuits Conference (ISSCC) 2017 is held February 5-9 in San Francisco. ISSCC is the foremost global forum for presentation of advances in solid-state circuits and systems-on-a-chip, with papers, tutorials and sessions on:
ISSCC2017

* Deep Learning Processors * Frequency Generated Voltage Regulators 
* Wireless and Wireline Systems * SoC and Emerging IoT Systems 
* Sensors * Gigahertz Data Converters * Power Amplifiers 
* Memory * Transmittors * Analog Techniques 
* Intelligent Machines: Will the Technology Singularity Happen? 
* High-Speed DNA Sequencing: Jurassic Park, Neanderthal, Moore, and You

INTELLIGENT CHIPS FOR A SMART WORLD * ISSCC.ORG

2017 Advance Registration open through January 15, 2017. Early rates available through January 8, 2017

 

 

20170205ALL

November 14, 2016

On-Chip ESD Protection Design: Yesterday, Today, Tomorrow and Future

by @ 1:23 pm. Filed under ALL, Computers/Software, Electronics Design, Reliability, Semiconductors
 

Thursday, December 1, 2016 
SCV-SF Electron Device Society (EDS) 
Subject: On-Chip ESD Protection Design: Yesterday, Today, Tomorrow and Future
– ESD protection, killing factor to the time to market of new IC products, ESD protection basics and traditional ESD protection solutions, new CAD tool for full-chip ESD protection circuit design verification… 
Speaker: Prof. Albert Wang, Dept. of Electrical and Computer Engineering, University of California, Riverside 
Time: 6:00 pm: Registration, networking, and refreshments; 6:15 pm to 7:00 pm: Presentation
Cost: Free 
Location: Texas Instruments, 2900 Semiconductor Way, Bldg. E Auditorium, Santa Clara 
Event Details: http://sites.ieee.org/scv-eds/ 

20161201ALL

October 21, 2016

Annual Symposium; Device Circuit Interaction in Advanced Technology Nodes 

by @ 9:21 pm. Filed under ALL, Electrical/Power, Electronics Design
 

Friday, November 11, 2016 
SCV-SF Electron Devices Society (EDS) and Components, Packaging, and Manufacturing Technologies (CPMT) Annual Symposium 
Subject: Device Circuit Interaction in Advanced Technology Nodes 
– device, circuit and system/architecture level interactions and co-optimizations in advanced technology nodes… 
Speakers: Dr. William J. Dally, Chief Scientist and Sr. VP of Research, NVIDIA, and Stanford Professor; Dr. Victor Moroz, Scientist, Synopsys; Dr. John Hu, Director, Advanced Technology, Nvidia Corporation; Dr. Kevin Scoones, Fellow, Texas Instruments; Dr. Suresh Ramalingam, Fellow, Advanced Packaging, Xilinx
Time: 1:00 pm to 5:30 pm,
Cost: Student IEEE Member: $15; Student non-IEEE Member: $20; IEEE Member: $40; Non-IEEE Member: $60 
Location: Texas Instruments, 2900 Semiconductor Way, Bdg. E Auditorium, Santa Clara

Event Details: http://sites.ieee.org/scv-eds/ 

20161111ALL

October 11, 2016

ISPCE 2017 – IEEE Symposium on Product Compliance Engineering CALL FOR PAPERS

by @ 3:07 pm. Filed under ALL, Consumer Electronics, Electronics Design, Product Safety
 
CALL FOR PAPERS

ISPCE 2017

IEEE Symposium on Product Compliance Engineering, Holiday Inn San Jose on May 8-10, 2017, with papers due no later than December 1, 2016

The IEEE Product Safety Engineering Society seeks original and unpublished formal papers, presentations (without formal papers), workshops, and tutorials on all aspects of product safety and compliance engineering including, but not limited to:

* Global Market Access & Regulations * Hazard Based Safety Engineering & Safety Science * Compliance * Forensics, Failure & Risk Analysis, Assessment & Management * Management * Legal, Regulations, Directives & Consumer Protection * EMC & Wireless Compliance * Emerging Technologies & Innovations * Environmental & Energy Regulations * Batteries & Energy Storage Systems * Medical Devices * Compliance 101 

2017.psessymposium.org/
ispce2017

 

20161201ALL

Demystifying Linear Time Varying Circuits 

by @ 1:59 pm. Filed under ALL, Electronics Design, Semiconductors, Signal Processing
 

Thursday, October 20, 2016 
SCV Solid State Circuits Society (SSCS)
Subject: Demystifying Linear Time Varying Circuits 
– An analog/mixed-signal designer encounters time varying circuits everywhere – sample-and-holds, chopper stabilized amplifiers, mixers, switched-capacitor amplifiers and filters, discrete and continuous-time delta sigma modulators, N-path filters … 
Speaker: Shanthi Pavan, Professor, Indian Institute of Technology-Madras 
Time: 6:00 pm: Networking and refreshements, 6:30 pm to 8:00 pm: Presentation and Q&A
Cost: Free 
Location: Maxim Integrated, Inc., Jack Gifford Event Center, Building A, 160 Rio Robles, San Jose 
Event Details: https://www.eventbrite.com/e/distinguished-lecturer-seminar-demystifying-linear-time-varying-circuits-by-shanthi-pavan-iit-madras-tickets-28335803150 

20161020ALL

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