Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences
The industry’s largest event dedicated to sensors, connectivity, and systems. Early bird registration is now open!
Held June 26-28, 2018, at the San Jose Convention Center. For more information, to go sensorsexpo.com/ Use promo code IEEESF for $100 off pass.
THE ONLY TECHNICAL PROGRAM COVERING 100% SENSORS
* Embedded Systems * IoT, Machine Learning
* 3D Vision, Optical * AI, 3D LiDAR Solid State
* Nano power, MEMS * Air quality measurement
* Energy Harvesting * Printed flexible, stretchable fabric
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Monday, April 16, 2018
SFBA Electron Device Society (EDS) and Engineering in Medicine and Biology Society (EMBS)
Subject: The Smaller the Better: A Sub-Millimeter Wireless Neural Stimulator
– As device size shrinks, it becomes difficult to deliver sufficient wireless power to operate the device, basic proof-of-concept with stimulation of both deep brain and peripheral nerve targets…
Speaker: Dr. Daniel Freeman, Principal MTS, Draper Lab
Time: 6:00 pm – 6:15 pm: Networking with food and refreshments; 6:15 pm – 7:00 pm: Seminar
Cost: Free
Location: Texas Instruments Building E Conference Center, 2900 Semiconductor Dr., Santa Clara
Event Details: http://sites.ieee.org/scv-eds/
Register: surveymonkey.com/r/SGHKM2G
Wednesday, December 6, 2017
SFBA Electron Devices Society (EDS)
Subject: 10th MOS-AK Compact Modeling Workshop in the Silicon Valley
– frontiers of the compact modeling for nm-scale MEMS designs and CMOS/SOI circuit simulations, compact/SPICE modeling and its Verilog-A standardization, physical, analytical and numerical models…
Speaker: Wladek Grabinski
Time:
Cost:
Location: Cadence Design Systems, 2655 Seely Ave, Building 5, San Jose
Event Details: http://www.mos-ak.org/silicon_valley_2017
Friday, December 8, 2017
SFBA Electron Devices Society (EDS)
Subject: 2D Electronics – Opportunities and Challenges
– 2D materials are introduced and the potential of 2D transistors is assessed, material properties – bandgap and mobility – are examined in detail and the mobility-bandgap tradeoff…
Speaker: Prof. Frank Schwierz, TU Ilmenau
Time: 4:00 pm
Cost:
Location: Stanford University, Packard Building 101
Event Details: http://sites.ieee.org/scv-eds/
Friday, December 1, 2017
SCV Solid State Circuits Society (SSCS)
Subject: Recent Developments in Transceiver SoC Design for Next Generation Optical Networks
– high-speed point-to-point reciprocal wireless optical link is necessary to support this hybrid network in radio backhaul and fiber fronthaul, RF-over-Fiber (RoF) and Baseband-over-Fiber (BoF)…
Speaker: Prof. Patrick Yue, HKUST
Time: 6:00 pm: Networking, registration, and refreshments; 6:30 pm to 8 pm: Presentation
Cost: Free; donation is accepted for refreshments (FREE SSCS members/$2 IEEE members/$5 non-members, pay online or at the door)
Location: Texas Instruments Building E Conference Center, 2900 Semiconductor Dr, Santa Clara
Event Details: http://sites.ieee.org/scv-sscs/
Tuesday, August 8, 2017
SCV Electron Device Society (EDS)
Subject: Recent Progress in Memory Technology Reliability
– novel materials and integration schemes from the cell to the packaging level, reliability failure modes associated with these materials and processes, DRAM, NAND, and emerging memories …
Speaker: Dr. Bob Gleixner, Micron Technology Inc.
Time: 6:00 pm to 6:15 pm: Networking with food and refreshments; 6:15 pm to 7 pm: Presentation
Cost: Free
Location: Texas Instruments Building E Conference Center, 2900 Semiconductor Dr, Santa Clara
Event Details: http://sites.ieee.org/scv-eds/
PCB WEST, the Silicon Valley’s largest event for the PCB supply chain, brings together engineers, designers, fabricators, assemblers and managers to take advantage of unique opportunities to improve skills, increase knowledge and network with peers, colleagues and experts.
75+ presentations on the hottest topics, including:
* 3D via modeling
* Fine pitch BGA design
* Flex design & parts placement
* Manufacturing IoT PCBs
* Noise control
* Package design
* PCB assembly troubleshooting
* PLUS 100+ exhibitors on the show floor!
Register today to attend PCB WEST, https://goo.gl/6f3nnL, at the Santa Clara Convention Center, featuring a three-day conference 9/12 -14 (https://goo.gl/Suu3eT) and a FREE one-day exhibition 9/13 (https://goo.gl/EHAPBu). Register for the conference by August 14 to receive a $100 discount.
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![]() * Persistent Memory * Storage Architecture * Cloud Storage Storage Developer Conference (SDC) 2017 will take place at the Santa Clara Hyatt, Santa Clara, CA on September 11-14, 2017. eGrid subscribers will receive the SNIA Member rate ($200 off of the regular rate) on registration by registering here and using code SDC17IEEEspecial. In addition, register before August 11th and save another $300 with the Early Bird Discount. |
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51st Annual Asilomar Conference on Signals, Systems, and Computers at the Asilomar Hotel and Conference Grounds, Pacific Grove, on October 29 – November 1, 2017
Authors are invited to submit papers on or before May 1st, 2017, in the following areas:
* Communications Systems
* MIMO Communications and Signal Processing
* Array Signal Processing
* Biomedical Signal and Image Processing
* Speech, Image and Video Processing
* Architecture and Implementation
* Networks; Signal Processing and Adaptive Systems
For detailed information see Call for Papers
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The 18th International Symposium on Quality Electronic Design ISQED 2017 is the premier interdisciplinary and multidisciplinary Electronic Design conference—bridges the gap among Electronic/Semiconductor ecosystem members providing electronic design tools, integrated circuit technologies, semiconductor technology, packaging, assembly & test to achieve total design quality.
With a theme of Security, IoT and Cyber-Physical systems, the conference will feature nearly 100 papers highlighting the latest trends in electronic circuit and system design & automation, test, verification, and semiconductor technologies
ISQED is being held in Santa Clara on March 15 – 17, 2017. isqed.org
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Tuesday, February 14th, 2017
SCV Consultants Network of Silicon Valley (CNSV)
Subject: The Technical Impossibilities of Autonomous Driving
– engineering overview of autonomous driving, and will describe its greatest technical challenges, companies in this field, skill areas that these companies are searching for …
Speaker: Dr. Mark J. Nitzberg of Caruma Technologies, Inc.
Time: 7:00 pm: Registration, networking, pizza and drinks; 7:30 pm to 9:00 pm: Presentation
Cost: Free
Location: NVIDIA, 2800 Scott Blvd., Building E, Santa Clara
Event Details: https://californiaconsultants.org/event/the-technical-impossibilities-of-autonomous-driving/
Advanced Engineering Courses 2017 at UC Santa Cruz
Courses are organized by MEAD Microelectronics and held at UC Santa Cruz from March 27-31, 2017
* Advanced Analog and Mixed-Signal Design
Noise coupling, ESD &EMC, sensor interfaces, circuit design
* Continuous-Time Delta-Sigma Design
Basics, modulators, dynamic element matching, VCO-based circuit nonlinearities
* Power Management
Converters, regulators, energy harvesting
Deadline for registration: February 20, 2017
http://mead.ch/MEADNEW/advanced-engineering-courses-uc-santa-cruz-california/
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The International Solid- State Circuits Conference (ISSCC) 2017 is held February 5-9 in San Francisco. ISSCC is the foremost global forum for presentation of advances in solid-state circuits and systems-on-a-chip, with papers, tutorials and sessions on:
* Deep Learning Processors * Frequency Generated Voltage Regulators
* Wireless and Wireline Systems * SoC and Emerging IoT Systems
* Sensors * Gigahertz Data Converters * Power Amplifiers
* Memory * Transmittors * Analog Techniques
* Intelligent Machines: Will the Technology Singularity Happen?
* High-Speed DNA Sequencing: Jurassic Park, Neanderthal, Moore, and You
INTELLIGENT CHIPS FOR A SMART WORLD * ISSCC.ORG
2017 Advance Registration open through January 15, 2017. Early rates available through January 8, 2017
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Thursday, December 1, 2016
SCV-SF Electron Device Society (EDS)
Subject: On-Chip ESD Protection Design: Yesterday, Today, Tomorrow and Future
– ESD protection, killing factor to the time to market of new IC products, ESD protection basics and traditional ESD protection solutions, new CAD tool for full-chip ESD protection circuit design verification…
Speaker: Prof. Albert Wang, Dept. of Electrical and Computer Engineering, University of California, Riverside
Time: 6:00 pm: Registration, networking, and refreshments; 6:15 pm to 7:00 pm: Presentation
Cost: Free
Location: Texas Instruments, 2900 Semiconductor Way, Bldg. E Auditorium, Santa Clara
Event Details: http://sites.ieee.org/scv-eds/
Friday, November 11, 2016
SCV-SF Electron Devices Society (EDS) and Components, Packaging, and Manufacturing Technologies (CPMT) Annual Symposium
Subject: Device Circuit Interaction in Advanced Technology Nodes
– device, circuit and system/architecture level interactions and co-optimizations in advanced technology nodes…
Speakers: Dr. William J. Dally, Chief Scientist and Sr. VP of Research, NVIDIA, and Stanford Professor; Dr. Victor Moroz, Scientist, Synopsys; Dr. John Hu, Director, Advanced Technology, Nvidia Corporation; Dr. Kevin Scoones, Fellow, Texas Instruments; Dr. Suresh Ramalingam, Fellow, Advanced Packaging, Xilinx
Time: 1:00 pm to 5:30 pm,
Cost: Student IEEE Member: $15; Student non-IEEE Member: $20; IEEE Member: $40; Non-IEEE Member: $60
Location: Texas Instruments, 2900 Semiconductor Way, Bdg. E Auditorium, Santa Clara
Event Details: http://sites.ieee.org/scv-eds/
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