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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

March 20, 2018

Machine-Learned Assessment and Prediction of Robust Solid State Storage System Reliability Physics

by @ 9:39 pm. Filed under ALL, Computers/Software, Reliability
 

Thursday, April 5, 2018 
SCV Reliability Chapter 
Subject: Machine-Learned Assessment and Prediction of Robust Solid State Storage System Reliability Physics
– acceleration stress can be analyzed leveraging Machine Learning, allows inferential and predictive assessments on reliable SSD design at system-level, in a quantitative and pro-active manner… 
Speaker: Jay Sarkar, Western Digital Corporation 
Time: 6:15 pm: Registration, refreshments, and networking; 7:00 pm: Presentation and Q&A; 7:45 pm: Adjourn
Cost: Free
Location: Qualcomm, 3165 Kifer Road, Building-B Cafeteria Santa Clara 
Event Details: eventbrite.com/e/machine-learned-assessment-and-prediction-of-robust-solid-state-storage-system-reliability-physics-tickets-44394840162 

20180405ALL

March 13, 2018

System Reliability Double Feature: Automotive Functional Safety + Exascale Supercomputer Fault Tolerance Design

by @ 2:19 pm. Filed under ALL, Reliability, Vehicular Technology
 

Thursday, March 15, 2018 
SCV Reliability Society and Vehicular Technology Society (VTS) 
Subject: System Reliability Double Feature: Automotive Functional Safety + Exascale Supercomputer Fault Tolerance Design
– autonomous vehicles (AV), ISO 26262 functional safety standard, with specific focus on its application to semiconductors, level of trust that the community is expecting from autonomous vehicles …
Speakers: Riccardo Mariani, Chief Functional Safety Technologist, Intel Corporation; Cameron McNairy, Principal Engineer and System Reliability, Availability and Serviceability (RAS) Architect, Intel’s high performance computing (HPC) solutions 
Time: 6:00 pm: Registration, networking, and pizza; 6:30 pm: Presentation: Automotive Functional Safety with Q&A; 7:15 to 8:00 pm: Presentation: Exascale Supercomputer Fault Tolerance Design with Q&A
Cost: Free
Location: Qualcomm, Inc. Building-B Cafeteria, 3165 Kifer Road, Santa Clara 
Event Details: sites.ieee.org/scv-rel/ 
Food sponsored by I.C.E. Labs, ISO 9001 & 17025 Reliability Test Lab, icenginc.com

20180315all

January 15, 2018

Best of RAMS – 2018

by @ 10:14 pm. Filed under ALL, Reliability
 

Thursday, February 8, 2017 
SCV Reliability Society
Subject: Best of RAMS – 2018
– best of Reliability and Maintainability Symposium (RAMS), expanding applications, such as self-driving cars, application of Big Data analytics to reliability, IOT, and reliability innovation in general… 
Speaker: Bernhard Hiller, Advanced Reliability Engineering of HDD, SSD and Archive Systems, Western Digital Corporation 
Time: 6:00 pm: Check in and refreshments; 6:30 pm: Presentation; 7:30 pm to 8:00 pm: Questions
Cost: Free 
Location: Qualcomm, 3165 Kifer Road, Building-B Cafeteria, Santa Clara 
Event Details: https://www.eventbrite.com/e/best-of-rams-2018-tickets-42222384288 

20180208ALL

October 4, 2017

9th Annual IEEE Soft Error Rate (SER) Workshop

by @ 3:59 pm. Filed under ALL, Computers/Software, Electrical/Power, Reliability
 

Tuesday, November 7, 2017
SCV Electronic Packaging Society (EPS – formerly CPMT), Reliability Society, and Electron Device Society (EDS)
Subject: 9th Annual IEEE Soft Error Rate (SER) Workshop
– two Tutorials, plus Practical Aspects (Xilinx), Susceptibility (IBM), Proton Beams (Intel), Solder Bump Materials (Mitsubishi), Underground Research (Stanford)…
Time: 8:30 am to 4:30 pm
Cost: Free; includes lunch
Location: Xilinx, 2100 Logic Drive, San Jose
Event Details: http://www.cpmt.org/scv/?p=409

20171107ALL

September 15, 2017

Financial and Managerial Accounting for Reliability – an Introduction

by @ 12:24 pm. Filed under ALL, Engineering Mgmt, Reliability
 

Thursday, October 5, 2017 
SCV Reliability Society 
Subject: Financial and Managerial Accounting for Reliability – an Introduction
– A product with poor reliability, basic principles behind the financial and managerial accounting process, how this applies to warranty expenses… 
Speaker: Wim Deweerd, Principal Engineer / Manager, Qualcomm Inc.
Time: 6:00 pm: Networking, registration, and refreshments; 6:30 pm to 8:00 pm: Presentation and Q&A
Cost: Free. Food sponsored by I.C.E. Labs, ISO 9001 & 17025 Reliability Test Lab, www.icenginc.com 
Location: Qualcomm, Inc., 3165 Kifer Road, Building-B Cafeteria Santa Clara 
Event Details: https://www.eventbrite.com/e/title-financial-and-managerial-accounting-for-reliability-an-introduction-tickets-37933130013

20171005ALL

August 14, 2017

Telemetry for IC Reliability

by @ 5:59 pm. Filed under ALL, Reliability
 

Thursday, September 7, 2017 
SCV Reliability Society 
Subject: Telemetry for IC Reliability
– acquisition of IC usage data remotely in the field, provides data about actual IC use conditions, reliability engineering, six stage framework for telemetry work which enables value to be derived … 
Speaker:  Robert Kwasnick, Intel Corp.
Time: 6:00 pm: Registration, networking, and refreshments; 6:30 pm to 8:00 pm: Presentation and Q&A 
Cost: Free
Location: Qualcomm, Building-B Cafeteria, 3165 Kifer Road Santa Clara
Event Details: https://www.eventbrite.com/e/telemetry-for-ic-reliability-tickets-37010193485 
Food sponsored by: ICE Labs, ISO 9001 & 17025 Reliability Test Lab. www.icenginc.com

20170907ALL

July 26, 2017

A Realistic and Useful ESD Test for Consumer Electronics

by @ 11:09 am. Filed under ALL, Reliability
 

Thursday, August 3, 2017 
SCV Reliability Society 
Subject: A Realistic and Useful ESD Test for Consumer Electronics
– new ESD test is being proposed for consumer electronics that is representative of field conditions and allows the prediction of field reliability…
Speaker: Michael Heaney, Principal Physicist, Amazon Lab126
Time: 6:00 pm: Registration, networking, and refreshments; 6:30 pm – 8:00 pm: Presentation and Q&A  
Cost: Free
Location: Qualcomm, Inc. (Building-B Cafeteria), 3165 Kifer Road, Santa Clara
Food sponsored by: ICE Labs, ISO 9001 & 17025 Reliability Test Lab. www.icenginc.com 
Eventbrite: https://www.eventbrite.com/e/a-realistic-and-useful-esd-test-for-consumer-electronics-tickets-36530947046

201710803ALL

May 15, 2017

Systematic Problem Solving in Reliability Engineering

by @ 11:41 am. Filed under ALL, Engineering Mgmt, Reliability
 

Thursday, June 1, 2017 
SCV Reliability Chapter 
Subject: Systematic Problem Solving in Reliability Engineering
– how to attack problems where there is data, no data, and where data must be generated, brainstorming, five whys, fault tree analysis, and fishbone diagram, TRIZ, HU, and quantitative methods… 
Speaker: John J. Flaig, Ph.D., Fellow, American Society for Quality (ASQ), Managing Director, Applied Technology 
Time: 6:00 pm: Check in, refreshments, and networking; 6:30 pm to 7:30 pm: Presentation; 7:30 pm to 8:00 pm: Questions 
Cost: Free; Food sponsored by I.C.E. Labs, ISO 9001 & 17025 Reliability Test Lab, www.icenginc.com 
Location: Qualcomm,
3165 Kifer Road, Building-B Cafeteria, Santa Clara 
Event Details: https://www.eventbrite.com/e/systematic-problem-solving-in-reliability-engineering-tickets-34614595186?ref=enivtefor001&utm_source=eb_email&utm_medium=email&utm_campaign=inviteformalv2&ref=enivtefor001&utm_term=attend

20170601ALL

April 21, 2017

The relationship between Reliability Testing and Failure Analysis 

by @ 5:25 pm. Filed under ALL, Reliability
 

Thursday, May 4, 2017 
SCV Reliability Society 
Subject: The relationship between Reliability Testing and Failure Analysis 
– variety of standard reliability test methods and the issues they stress, typical failures found and the methods used to find them … 
Speaker: Daniel Sullivan, EAG Lab
Time: 6:00 pm: Registration, networking, and refreshments; 7:30 pm to 8:00 pm: Presentation
Cost: Free
Location: Qualcomm, Inc., 3165 Kifer Road, Building-B Cafeteria, Santa Clara 
Event Details: https://www.eventbrite.com/e/the-relationship-between-reliability-testing-and-failure-analysis-tickets-33883619819?aff=eivtefrnd?utm_source=eb_email&utm_medium=email&utm_campaign=evitefrnd&utm_term=eventimage 

20170504ALL

April 13, 2017

Ten Years of Robustness Validation Applied to Power Electronics Components

by @ 11:27 am. Filed under ALL, Electrical/Power, Reliability, Semiconductors
 

Thursday, April 27, 2017
SCV Components, Packaging, and Manufacturing Technologies (CPMT), Reliability, and Power Electronics Chapters
Subject: Ten Years of Robustness Validation Applied to Power Electronics Components
– European car makers, physics of failure, “test to fail”, end-of-life testing, thick wire bonds, planar interconnects…
Speaker: Dr Eckhard Wolfgang, European Center for Power Electronics e.V. (retired from Siemens Research)
Time: 11:30 am: Registration, networking, and pizza & drinks; 12:00 pm to 1:00 pm: Presentation; If coming for presentation only: arrive at 11:45
Cost: IEEE members students, unemployed: $5; Non-members: $10; Add an additional $5 at door
Location: Texas Instruments Building E Conference Center, 2900 Semiconductor Dr, Santa Clara
Event Details: http://www.cpmt.org/scv/

20160427ALL

February 12, 2017

Data Analytics-Propelled Reliability Engineering 

by @ 11:13 pm. Filed under ALL, Reliability
 

Thursday, March 2nd, 2017 
SCV Reliability Society and Components, Packaging, and Manufacturing Technologies (CPMT) 
Subject: Data Analytics-Propelled Reliability Engineering 
-Parametric measurements and Machine Learning provide tools to propel reliability decision making to the next level in all phases of the product life cycle … 
Speakers: Bernhard Hiller, Leader of the Advanced Reliability Engineering team, Western Digital Corporation 
Time: 6:00 pm: Check in, networking, refreshments 6:30 pm: Presentation; 7:30 pm: Adjourn 
Cost: Free; Food sponsored by: ICE Labs, ISO 9001 & 17025 Reliability Test Lab www.icenginc.com 
Location:  Google, 2011 Stierlin Ct., Mountain View
Event Details: https://www.eventbrite.com/e/data-analytics-propelled-reliability-engineering-tickets-32342714931 

20170302ALL

January 26, 2017

Copper Pillar, ELK, and Solder: The Challenges of Assembly and Long-Term Reliability at 28nm and 16nm 

by @ 1:19 pm. Filed under ALL, Reliability, Semiconductors
 

Thursday, February 9th, 2017 
SCV Reliability Society and Components, Packaging, and Manufacturing Technologies (CPMT) 
Subject: Copper Pillar, ELK, and Solder: The Challenges of Assembly and Long-Term Reliability at 28nm and 16nm 
– increasing use of ELK and ULK, especially at higher metal layers, has allowed for lower RC constants and better performance, come at a cost… 
Speakers: Dr. Craig Hillman of DfR Solutions, CEO 
Time: 6:00 pm: Check in, networking, refreshments 6:30 pm: Presentation; 7:30 pm: Adjourn 
Cost: Free; Food sponsored by: ICE Labs, ISO 9001 & 17025 Reliability Test Lab. www.icenginc.com 
Location: Qualcomm, Inc. (Building-B Cafeteria), 3165 Kifer Road, Santa Clara
Event Details: https://scvrelfeb2017.eventbrite.com/ 

January 25, 2017

International Reliability Physics Symposium (IRPS) 2017

by @ 3:35 pm. Filed under ALL, Product Safety, Reliability, Semiconductors
 

Join us for International Reliability Physics Symposium (IRPS) 2017, the world’s pre-eminent forum for reporting technological breakthroughs in the area of microelectronics reliability. IRPS 2017 will be held on April 2-6 at the Hyatt Regency Monterey Hotel and Spa on Del Monte Golf Course in Monterey.
Keynote talks are:
* Reflections on the risk of human space exploration – lessons learned from past failures
* System Level Reliability Challenges with Technology Scaling
Conference topics include:
3D 2.5D / 3D / Packaging * Product Reliability * Back-End Dielectrics * Photovoltaics * Circuit Aging / Reliability * Reliability Testing * Electrostatic Discharge * Soft Errors * Failure Analysis * System Reliability * Front-End Dielectrics * Wide Band Gap * Metallization Reliability * Transistor Reliability * Memory Reliability * Transistors – Beyond CMOS * Process Integration
Plesae register at irps.org/

 

20170402ALL

November 14, 2016

On-Chip ESD Protection Design: Yesterday, Today, Tomorrow and Future

by @ 1:23 pm. Filed under ALL, Computers/Software, Electronics Design, Reliability, Semiconductors
 

Thursday, December 1, 2016 
SCV-SF Electron Device Society (EDS) 
Subject: On-Chip ESD Protection Design: Yesterday, Today, Tomorrow and Future
– ESD protection, killing factor to the time to market of new IC products, ESD protection basics and traditional ESD protection solutions, new CAD tool for full-chip ESD protection circuit design verification… 
Speaker: Prof. Albert Wang, Dept. of Electrical and Computer Engineering, University of California, Riverside 
Time: 6:00 pm: Registration, networking, and refreshments; 6:15 pm to 7:00 pm: Presentation
Cost: Free 
Location: Texas Instruments, 2900 Semiconductor Way, Bldg. E Auditorium, Santa Clara 
Event Details: http://sites.ieee.org/scv-eds/ 

20161201ALL

October 19, 2016

8th Annual IEEE CPMT SCV Soft Error Rate (SER) Workshop

by @ 9:58 pm. Filed under ALL, Computers/Software, Reliability, Semiconductors
 

Thursday, November 3, 2016
SCV Components, Packaging, and Manufacturing Technologies (CPMT) and Reliability Chapter
Subject: 8th Annual IEEE CPMT SCV Soft Error Rate (SER) Workshop
– three Tutorials, An Introduction to Single Event Effects (Xilinx), System Design Considerations for Soft Error Mitigation (iROC), Techniques and Challenges of Alpha Emissivity Measurements (XIA, IBM) …
Time: 9:30 am to 3:30 pm
Cost: Free; includes lunch
Location: Juniper Networks, Building 6, 1215 Borregas Ave, Sunnyvale or via Webex
Event Details: http://www.cpmt.org/scv/
Sponsors: IEEE CPMT Santa Clara Valley (SCV) Chapter, and Juniper Networks; Pure Technologies; Cisco Systems; XIA

20161103ALL

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