IEEE S.F. Bay Area Council e-GRID's
BayAreaTech

Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

December 7, 2007

Mtg: Educating Engineers in Advanced Silicon Processes

by @ 6:38 pm. Filed under ALL, Electronics Design, Engineering Mgmt, Semiconductors
 

WEDNESDAY December 19
SCV Education Chapter
Speaker: Dr. Kris Verma
Time: dinner at 6:30 PM, Presentation at 7:00 PM
Cost: none
Place: Silicon Valley Technical Institute; 1762 Technology Dr., Suite 227, San Jose
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/es

 

During the last two decades, the Semiconductor Industry model? has changed from Vertical (Design, Fab, Test, and Packaging) under one IDM (Integrated Device Manufacturer) to a Horizontal model (Fabless Design Houses, IP developers, Wafer Mega Foundries, and subcontractors for test and assembly) under different companiesâ?? management. ? This new business model? (more…)

Mtg: Small Stuff in Search of the Big Bucks: Nanotechnology Commercialization by Sector

by @ 6:37 pm. Filed under ALL, BioEngineering, Communications, Computers/Software, Electronics Design, Engineering Mgmt, NanoEngineering, Optics/Displays, Semiconductors
 

TUESDAY December 18
SCV Nanotechnology Chapter
Speaker: Kristin Abkemeier, Ph.D., Analyst at Lux Research, Inc.
Time: Registration & Light Lunch 11:30 AM, Presentation at Noon
Cost: IEEE Members and Students $5. Non-Members $10
Place: National Semiconductor Bldg E-1 CMA Room. 2900 Semiconductor Drive, Santa Clara
RSVP: at the website
Web: www.ieee.org/nano

Nanotechnology is shifting from research labs to markets, as world investments reached $12.6 billion in 2006. ? With the first applications in-market in the materials, electronics and energy, and life science sectors, the impact of nanotechnology in different industries varies from broad and incremental in nature, (more…)

Mtg: Nanowires and Nanolasers: How Small can a Laser be?

by @ 6:36 pm. Filed under ALL, Communications, Electronics Design, Engineering Mgmt, Optics/Displays, Semiconductors
 

THURSDAY December 13
SCV Lasers and Electro Optics Chapter
Speaker: Prof. Cun-Zheng Ning, Arizona State University, and LEOS Distinguished Lecturer
Time: Networking and Food: 7:00 PM, Presentation: 8:00 PM
Cost: none
Place: National Semiconductor Building E Conference Center, 2900 Semiconductor Drive, Santa Clara
RSVP: by email to ieeescvleos-rsvp2007@yahoo.com
Web:
www.ewh.ieee.org/r6/scv/leos

 

The pursuit of nanotechnology in general and miniaturization of electronic devices in particular have seriously challenged the optoelectronics community to develop ever smaller lasers and optoelectronic devices compatible with the trend in microelectronics. Vertical-cavity surface emitting lasers measured a few microns were once the smallest lasers. ? The situation is now rapidly changing over the last 5 years with the demonstration of lasing capability of a single semiconductor nanowire of ~ 100 nanometers in diameter. ? The ultimate challenge to the community is: can one make a laser that is smaller than the wavelength in all 3 dimensions, or what is the ultimate size limit of a laser?

To answer this and related questions, my lecture will start with an overview of impressive recent progress in growth, fabrication, and characterization of semiconductor nanowires and demonstration of lasing activities in various wavelengths. ? These lasers represent one of the smallest lasers of any kind (more…)

Mtg: PLL Design Essentials for Wireless Systems

by @ 6:35 pm. Filed under ALL, Communications, Electronics Design, Engineering Mgmt, Semiconductors
 

THURSDAY December 13
SCV Microwave Theory and Techniques Chapter
Speaker: Derek K. Shaeffer, RF Engineering Manager, Beceem Communications
Time: Refreshment and Social Hour at 6:00 PM, Presentation at 6:30 PM
Cost: none
Place: National Semiconductor, Bldg #9, Classroom #4, 2900 Semiconductor Dr., Santa Clara
RSVP: not required
Web: www.mtt-scv.org

 

This talk provides an overview of PLL design fundamentals and reviews performance considerations that typify wireless systems.? By the end of the talk, attendees will understand how to translate system performance requirements into synthesizer design specifications (more…)

Mtg: Electrical Out-of-Step Protection

by @ 6:34 pm. Filed under ALL, Electrical/Power, Engineering Mgmt
 

THURSDAY December 13
SF Power Engineering Chapter
Speaker: Demetrios Tziouvaras, Schweitzer Engineering Laboratories, Inc.
Time: Noon (includes lunch)
Cost: free for IEEE members; $5 for non-members
Place: Pacific Gas & Electric Office, 245 Market St., Conference Room 1411, San Francisco
RSVP: by Dec. 6th (first 25 people only) to Davis Erwin, dpe4@pge.com, 415-973-6010
Web: www.e-grid.net/docs/0712-sf-pes.pdf

 

Alternating current (AC) electrical networks can experience loss of synchronism (out-of-step, OOS) during stressed power system conditions. ? During an OOS event, large current and voltage excursions develop across the electrical connection between two diverging grid sections.? (more…)

Mtg: Technical Management in Silicon Valley

by @ 6:33 pm. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt
 

THURSDAY December 13
SCV Engineering Management Chapter
Subject: Technical Management in Silicon Valley (Topical discussions; election of officers)
Time: 7:30 AM (no-host breakfast)
Cost: no cost
Place: DENNY’S, 311 S. Mathilda Avenue, Sunnyvale
RSVP: not needed
Web: www.ieee-scv-ems.org

? Our objective, during this informal breakfast, is to network on technical management vs. leadership â?? where this discipline is going and what is available education-wise; have a discussion about what topics members would like for future local meetings;? (more…)

Mtg: Radiated and Conducted Emission Debug Techniques

by @ 6:32 pm. Filed under ALL, Computers/Software, Electronics Design, Engineering Mgmt, Semiconductors
 

TUESDAY December 11
SCV Electromagnetic Compatibility, and Product Safety Engineering Chapters
Speaker: Dr. Keith Hardin, Lexmark International, Inc.
Time: catered ‘Holiday Celebration’ dinner at 5:30 PM; elections; presentation at 6:30 PM
Cost: none
Place: Applied Materials Bowers Cafeteria, 3090 Bowers Ave., Santa Clara
RSVP: not required
Web: www.scvemc.org

Radiated and conducted emissions contain spectral and time domain information that can be very helpful in determining the sources of the emissions and possible countermeasures for information technology products. This presentation will discuss a number of methods (more…)

Mtg: Wireless Standards: A History and Perspective / CNSV Annual Meeting

by @ 6:29 pm. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt, Semiconductors
 

TUESDAY December 11
SCV Consultants’ Network of Silicon Valley
Speaker: Bruce Himebauch, Atheros Communications
Time: Election of Officers at 7:00 PM; presentation at 7:15 PM
Cost: none
Place: Silicon Valley Technical Institute, 1762 Technology Dr., Suite 227, San Jose
RSVP: not required
Web: www.CaliforniaConsultants.org

Most commercial wireless networking products conform to the 802.11b, 802.11a, 802.11g and 802.11n standards, collectively known as Wireless Fidelity (Wi-Fi). Wi-Fi has been accepted in businesses, schools, government and homes as an alternative to wired LANs. ? The 802,11 standards have similarities (more…)

Mtg: Nanotechnology Trends in Nonvolatile Memory Devices

by @ 6:28 pm. Filed under ALL, Computers/Software, Electronics Design, Engineering Mgmt, NanoEngineering, Semiconductors
 

TUESDAY January 15
SCV Nanotechnology Chapter
Speaker: Gian-Luca Bona, Ph.D., Dept Group Manager of Science & Technology, IBM Almaden Research Center
Time: Light lunch 11:30 AM, Presentation at Noon
Cost: IEEE Members and Students $5, Non-Members $10
Place: National Semiconductor Bldg E-1 CMA Room. 2900 Semiconductor Drive, Santa Clara
RSVP: from the website
Web: www.ieee.org/nano

A large variety of materials for applications in non-volatile storage memories is currently being explored in academic research and industrial development laboratories. ? The technologies considered range from magnetic domain switching to resistance switching in phase change chalcogenide materials, solid electrolytes as well as (more…)

[IEEE S.F. Bay Area Council - www.e-grid.net] [powered by WordPress .]

SF Bay Area Council

Categories

  • ALL (4,556)
  • Antennas & Propagation (4)
  • BioEngineering (663)
  • Blogroll (33)
  • Circuits (11)
  • Communications (1,853)
  • Computers/Software (1,743)
  • Consumer Electronics (97)
  • Control Systems (18)
  • Electrical/Power (1,263)
  • Electronics Design (2,768)
  • Employment (4)
  • Employment opportunities (5)
  • Engineering Mgmt (1,805)
  • Green energy (40)
  • History (3)
  • Industrial Applications (73)
  • Information Theory (10)
  • Magnetics (22)
  • Microwave (8)
  • NanoEngineering (869)
  • Optics/Displays (968)
  • Photonics (24)
  • PhotoVoltaics (3)
  • Product Safety (21)
  • Reliability (34)
  • Robotics and Automation (15)
  • Semiconductors (1,827)
  • Signal Processing (132)
  • Vehicular Technology (9)
  • Women in Engineering (7)
  • Young Professionals (2)
  •  

    Support our advertisers:

    Visit our
    GRID MARKETPLACE

    Enabling Javascript allows us to show you upcoming conferences in this column.

    For the Firefox browser, select Tools/Options/Content and select "Enable Javascript".

    If you are using Microsoft Internet Explorer you may need to click on the yellow bar above and select 'Allow Blocked Content'. You must then click 'Yes' on the following security warning.

    archives:

    December 2007
    S M T W T F S
    « Nov   Jan »
     1
    2345678
    9101112131415
    16171819202122
    23242526272829
    3031  

    View in Google Calendar

    search blog:


    SUBSCRIBE: Get the e-GRID twice a month by email - upcoming IEEE SF Bay Area meetings, conferences.

    RSS Feed Subscribe to our RSS Feed.

    PUBLICIZE your event to IEEE's membership.


    general links:

    19 queries. 0.803 seconds