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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

January 13, 2008

Mtg: Performance Limitations of Cu/low-k Interconnects and Possible Alternatives

by @ 6:50 pm. Filed under ALL, Computers/Software, Electronics Design, Engineering Mgmt, NanoEngineering, Semiconductors
 

TUESDAY February 19
SCV Nanotechnology Chapter
Speaker: Prof. Krishna Saraswat, Stanford University, Department of Electrical Engineering
Time: Registration & light lunch 11:30 AM, Presentation at noon
Cost: IEEE Members and Students $5, Non-Members $10
Place: National Semiconductor Bldg E-1 CMA Room. 2900 Semiconductor Drive, Santa Clara
RSVP: through the website
Web: www.ieee.org/nano

 

For more than 30 years, the performance of silicon integrated circuits has improved at an astonishing rate. ? However, looking into the future the relentless scaling paradigm is threatened by fundamental limits including excessive power dissipation, insufficient communication bandwidth, (more…)

Mtg: Nanomaterials for Alternative Energy: Battery Pack Systems

by @ 11:20 am. Filed under ALL, Electrical/Power, Engineering Mgmt, NanoEngineering
 

TUESDAY February 19
OEB Power Engineering Chapter
Speaker: Bob Goebel, Vice President Sales and Marketing, Altair Nanotechnologies
Time: 6:30 PM
Cost: $15 for members and students, $25 for non-members
Place: Scotts Seafood in Jack London Square, Oakland
RSVP: by email to Carole Pharr, wpharr@aol.com
Web: www.e-grid.net/docs/0802-oeb-pes.pdf

 

Altairnano is a leading manufacturer of advanced battery pack systems, which are used in stationary power applications, and electric and hybrid-electric vehicles. They have substantial experience in commercializing innovative, disruptive technologies. (more…)

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