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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

February 8, 2008

Mtg: Vector Network Analyzer Extensions

by @ 11:30 am. Filed under ALL, Communications, Electronics Design, Semiconductors
 

THURSDAY February 14
SCV Microwave Theory and Techniques Chapter
Speaker: David V. Blackham, Agilent Technologies
Time: Refreshments at 6:00 PM, Presentation at 6:30 PM
Cost: none
Place: National Semiconductor, Building 9, Classroom 4, 2900 Semiconductor Dr, Santa Clara
RSVP: not required
Web: www.mtt-scv.org

 

Recent enhancements to vector network analyzers (VNA) enable a broader range of measurements. ? This presentation will review fundamental concepts (more…)

Mtg: Telepresence for Collaboration

by @ 11:29 am. Filed under ALL, Communications, Engineering Mgmt, Optics/Displays
 

WEDNESDAY February 13
SCV Communications Chapter
Speaker: Chuck Stucki, Vice President/General Manager, TelePresence Systems Business Unit, Cisco
Time: 6:00 PM
Cost: none
Place: National Semiconductor, Building E, Conference Room, 2900 Semiconductor Dr, Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/comsoc

 

Today’s collaboration tools significantly boost productivity รข?? however, most users would agree that they are still no substitute for being there “in person.” Early videoconferencing solutions (more…)

Mtg: High Volume Print Forming: Filling the Gap between Nano and ‘Just-Plain-Miniature’ Devices

by @ 11:28 am. Filed under ALL, Electronics Design, NanoEngineering, Optics/Displays, Semiconductors
 

WEDNESDAY February 13
SCV Components, Packaging and Manufacturing Technology Chapter
Speaker: Arthur L. Chait, President, EoPlex Technologies
Time: Optional dinner at 6:30 PM, Presentation at 7:30 PM
Cost: $25 for dinner, no cost for presentation
Place: Ramada, 1217 Wildwood Ave (Fwy 101 frontage road, between Lawrence Expressway and Great America Parkway), Sunnyvale
RSVP: by email with Janis Karklins, karklins@ieee.org

 

A great deal of progress has been made in the field of nano and related “tiny” technologies. ? Unfortunately, the technology to link the tiny world to the macro world has not kept pace. ? The space between nano and macro is immense. ? At the nano end (more…)

Mtg: Using a Spatial View to Understand and Solve Common Power Bypass Problems

by @ 11:26 am. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt
 

TUESDAY February 12
SCV Electromagnetic Compatibility Chapter
Speaker: Steve Weir, Teraspeed Consulting Group LLC
Time: Social at 5:30 PM, Presentation at 6:30 PM
Cost: none
Place: Applied Materials Bowers Cafeteria, 3090 Bowers Ave., Santa Clara
RSVP: not required
Web: www.scvemc.org

An ideal power delivery system exhibits a flat impedance at a low enough value across the load frequency. ? In practice this is not practical: as ICs routinely depend on a specific minimum real power supply impedance, interconnects (more…)

Mtg: Patterned Nanomagnetic Bits and Devices for Higher Areal Density

by @ 11:25 am. Filed under ALL, Computers/Software, Engineering Mgmt, NanoEngineering, Semiconductors
 

TUESDAY February 12
SCV Magnetics Chapter
Speaker: Bruce D. Terris, Hitachi Global Storage Technologies, and 2008 IEEE Magnetics Society Distinguished Lecturer
Time: Cookies & Conversation at 7:30 PM, Presentation at 8:00 PM
Cost: none
Place: WDC (formerly Komag), 1710 Automation Parkway, San Jose
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/mag

As conventional magnetic recording technology extends to ever higher areal density, it is possible the often predicted, and constantly increasing, density limit will be reached. ? This limit will likely be in the range (more…)

Mtg: Simplified Fast Motion Estimation: Simplified and Unified Multi-Hexagon Search with Context Adaptive Lagrange Multiplier

by @ 11:24 am. Filed under ALL, Communications, Electronics Design, Engineering Mgmt, Semiconductors
 

MONDAY February 11
SCV Signal Processing & Circuits and Systems Chapter
Speaker: Nam Ling, PhD, IEEE Fellow & IEEE Distinguished Lecturer, Santa Clara University
Time: Fast Food & drinks at 6:30 PM, Presentation at 7:00 PM
Cost: $2 suggested for refreshments
Place: National Semiconductor (north end of Building E), 2900 Semiconductor Dr, Santa Clara
RSVP: not required
Web: ewh.ieee.org/r6/scv/sps

Fast motion estimations are especially important to speed up the time-consuming encoding processes for H.264 video encoding. ? In this talk, we first present our simplified fast motion estimation method, called (more…)

SVTI Classes: Solar Energy, CMOS Design, Semiconductor Fab

by @ 11:21 am. Filed under ALL, Electrical/Power, Semiconductors
 

Co-sponsored by IEEE Santa Clara Valley Section
Silicon Valley Technical Institute – Winter Classes
– 1762 Technology Dr #227, San Jose – +1-408-573-0100
Full Listing of Seminars and Courses IEEE Members save $30.

SVTI is an educational and research organization providing training programs covering various aspects of electronic design, design automation, communications engineering
(more…)

UCSC-Extension Courses: Jitter, SW Test, OO Design, Java, more

by @ 11:16 am. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt
 

UPCOMING CLASSES for Working Engineers
UC Santa Cruz Extension in Silicon Valley [more]
– Classes at our Sunnyvale and Cupertino Campuses
Register early for a 10% discount. Browse the full course listing and other information: www.ucsc-extension.edu/EngTech

Partial list of courses:

Switching and Routing Feb 21 to Apr 24, Thu 6:30 to 9:30PM
Jitter Essentials Mar 10-11,Mon-Tue, 9:00AM to 5:00PM
Black-Box Software Testing Mar 10-12, Mon-Wed 9:00AM – 5:00PM
Testing Software Components and COTS-based Software Feb 23 to Mar 29, Sat 9AM to 1PM
Object-oriented Analysis and Design Feb 18 to Apr 21, Online Instruction
Comprehensive Java Programming Jan 22 to Mar 25, Tue 6:30PM-9:30PM


Conf: Int’l Symposium for Quality Electronic Design

by @ 11:13 am. Filed under ALL, Electronics Design, Engineering Mgmt
 

9th International ISQED 2008:
Int’l Symposium for Quality Electronic Design [more]
— March 17-19, 2008 — DoubleTree Hotel, San Jose
— Tutorials — Sessions
Earlybird rate through March 10th; No-cost exhibits pass
More information: www.isqed.org

ISQED bridges the gap among electronic design tools and processes, integrated circuit technologies, processes, and manufacturing — for VLSI circuits & systems designers (IP & SoC), process/device technologists (more…)

Conf: Semiconductor Thermal Measurement, Modeling and Management Symposium and Exposition

by @ 11:07 am. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt, Semiconductors
 

IEEE SEMI-THERM:
Semiconductor Thermal Measurement, Modeling and Management Symposium and Exposition
— March 16-20, 2008 — Fairmont Hotel, San Jose
— Sessions — Exhibits — Short Courses
Full information: www.semi-therm.org

SEMI-THERM is the premier forum for the exchange of information between the industrial and academic communities on topics related to semiconductor thermal measurement, modeling and management. It has a unique combination of technical paper presentations, tutorials, (more…)

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