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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

December 18, 2009

Mtg: Technology Trends for Magnetic Storage: What is the Future?

by @ 4:26 pm. Filed under ALL, Computers/Software, Electronics Design, NanoEngineering, Optics/Displays, Semiconductors
 

TUESDAY February 16, 2010
SCV Magnetics Chapter
Speaker: Dr. Edward Grochowski, Computer Storage Consultant
Time: Networking and pizza at 7:00 PM; Presentation at 7:30 PM
Cost: none
Place: Western Digital, 1710 Automation Parkway, San Jose
RSVP: not required
Web: ewh.ieee.org/r6/scv/mag

Today├ó??s hard disk drive has evolved through miniaturization into a small storage device with up to 2.5 Terabytes of storage, with the promise of multiterabyte products appearing in the very near (more…)

Mtg: A New Paradigm for Exchange Bias in Polycrystalline Films

by @ 4:14 pm. Filed under ALL, Electronics Design, NanoEngineering, Optics/Displays, Semiconductors
 

TUESDAY January 12, 2010
SCV Magnetics Chapter
Speaker: Kevin O’Grady, The University of York (2010 IEEE Magnetics Society Distinguished Lecturer)
Time: Networking and pizza at 7:00 PM; Presentation at 7:30 PM
Cost: none
Place: Western Digital, 1710 Automation Parkway, San Jose
RSVP: via website
Web: ewh.ieee.org/r6/scv/mag

The phenomenon of exchange bias has remained something of a mystery since it was first discovered in core shell particles in 1956.? Over the subsequent years many different models have been (more…)

Seminar: 3D Interconnect – Shaping Future Technology

by @ 3:14 pm. Filed under ALL, Communications, Computers/Software, Electronics Design, NanoEngineering, Semiconductors
 

FRIDAY January 29, 2010
SCV Electron Devices Chapter
Speakers: experts from academia and the semiconductor industry; to be announced
Time: 9:00 AM to 5:00 PM
Cost: Free. Refereshments and lunch provided
Place: Hyatt Regency Hotel, Santa Clara
RSVP: Through the website link
Web: www.ewh.ieee.org/r6/scv/eds

The demand for higher densities, smaller form factors, and greater functionality, and the quest for developing post-CMOS technologies is spurring ongoing research in a wide variety of wafer-scale (more…)

Mtg: Getting the Most Out of Your Electrical Room

by @ 2:24 pm. Filed under ALL, Electrical/Power
 

TUESDAY February 23, 2010
SF Industry Applications Chapter
Speaker: Daniel Thompson, Schneider Electric
Time: Social at 5:30 PM, Presentation at 6:00 PM, Dinner at 7:00 PM
Cost: $25 (at the door); $10 for sutdent members (first 5)
Place: Sinbad’s Restaurant, Pier 2 The Embarcadero, San Francisco
RSVP: Please email Frank Sylvester, fsylvester@sfwater.org for reservations and to qualify for the drawing.
Web: www.e-grid.net/docs/1002-sf-ias.pdf

Is your architect pushing you to size the Electrical Room without room to wiggle?? Fear not, because Daniel is here!? He will focus on common consultants├ó?? FAQs about the 4 main topics of Electrical Room (more…)

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