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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

January 29, 2010

Mtg: Big Gains in Productivity and On-time Delivery: Winning Schedules and Management Methods

by @ 10:31 am. Filed under ALL, Engineering Mgmt

THURSDAY February 4, 2010
SCV Technology Management Chapter
Speaker: Oliver Gildersleeve, VP, EPM Solutions
Time: Guided Networking at 6:30 PM; Sandwiches/drinks at 7:15 PM; Presentation at 7:45 PM
Cost: $10 (IEEE member), $13 (non member) – Cash or check at the door; add $3 without reservation
Place: Ramada Inn, 1217 Wildwood Ave, Sunnyvale
RSVP: Through the website

Developing new products and enhancements during the bottom of this recession enables company recovery and growth when the economy expands.? Minimizing costs and maximizing revenue depends on high (more…)

Happy Hour to Connect Job Seekers with Start-Ups

by @ 10:29 am. Filed under ALL, BioEngineering, Communications, Computers/Software, Electrical/Power, Electronics Design, NanoEngineering, Optics/Displays, Semiconductors

TUESDAY February 2, 2010
JobNob and PACE Members in Transition Group
Speakers: project managers and executives from various start-ups
Time: Networking and refreshments at 4:30 PM; Start-up “Elevator Talks” begin at 5:00 PM sharp
Cost: none
Place: Illusions Supper Club, 260 South California Ave., Palo Alto
RSVP: through the website
Web: JobNob website

Mtg: Photonics in the Zettabyte Network Evolution

by @ 10:27 am. Filed under ALL, Communications, Optics/Displays

TUESDAY February 2, 2010
SCV Photonics Chapter
Speaker: Dr. Loukas Paraschis, Cisco Systems (2009 IEEE Photonics Society Distinguished Lecturer)
Time: Networking and light dinner at 6:00 PM, Presentation at 7:00 PM
Cost: none
Place: National Semiconductor Building E Auditorium, 2900 Semiconductor Drive, Santa Clara
RSVP: By Jan. 31 through the website, for food estimate

This presentation reviews the advancements in converged WDM network architectures, system, standards, and the enabling photonics technology.? The scalable, cost-effective network evolution is very important for supporting (more…)

Memristor and Memristive Systems Symposium

by @ 10:26 am. Filed under ALL, Electronics Design, NanoEngineering, Semiconductors

UC Merced and UC Berkeley, with NSF and HP Labs
Memristor and Memristive Systems Symposium
— Tuesday, February 2, 2010 ? ? — 8:30 AM to 5:00 PM
— Sutardja Dai Hall, UC Berkeley ? ? — NO COST
— Refreshments and lunch provided (funded by NSF)
Engineers, scientists, entrepreneurs, and academics are invited to attend, held in conjunction with IEEE CNNA 2010.
Talk titles: ? – Memristor Minds ? – Hybrid CMOS-Memristor Reconfigurable Logic ? – Making and Measuring Memristors ? – Peering Inside a Functioning Memristive Device ? – Silicon Technology Roadmap ? – Memristor-Based CAM as a part of SoS Architecture ? – Flexible Memristors ? – Memristor Technology in Non-Volatile Memory Architecture ? – plus a panel
Speakers: Leon Chua, UC-Berkeley; Stan Williams, HP Labs; Steve Hillenius, SRC; Curt Richter, NIST; Pinaki Mazumder, U-Mich; and others
Full program and registration:
Includes admission to the Feb. 3rd afternoon “Memristor” poster session at CNNA 2010 at the Shattuck Plaza Hotel — see

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