IEEE S.F. Bay Area Council e-GRID's

Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

March 6, 2010

Engineer Volunteers Needed as Judges

by @ 8:33 am. Filed under ALL, Communications, Computers/Software, Electrical/Power, Electronics Design, Optics/Displays, Semiconductors

Intel International Science and Engineering Fair
Engineer Volunteers Needed as Judges ?
— Over 1500 top high school students ? — Coming from 53 countries ? — In San Jose
— Tuesday, May 11 and Wednesday, May 12 at the SJ Convention Center ? ? — We need you!
Judges’ recruitment is in full swing, and there is a need for engineering judges. Read more about it; you can apply to be a Volunteer Grand Awards Judge at the following link:

Discover “E” 2010 Needs Volunteer Engineers

by @ 8:32 am. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt, Semiconductors

Discover “E” 2010 Needs Volunteer Engineers ?
— Speak at local schools in March
— Coordinated by the Silicon Valley Engineering Council (SVEC)
The Discover “E” engineering outreach program is sponsored nationwide by the engineering profession. Thousands of engineers throughout the US will speak to millions of students and teachers. Our goal is to increase students’ appreciation and understanding of the engineering profession and technology. To sign up, visit:

Conf: Northern California Electronic Materials Symposium

by @ 8:31 am. Filed under ALL, BioEngineering, Electronics Design, Engineering Mgmt, NanoEngineering, Optics/Displays, Semiconductors

IEEE SCV EDS Chapter & TMS — 38th annual
Northern California Electronic Materials Symposium
— 8:00 AM – 5:00 PM, April 16, 2010 ? — Techmart Meeting Center, Santa Clara
–General Admission: $100 ? ? — Student Rate: $50
A broad spectrum of expert views on problems at the intersection of electronic materials and devices. ? Confirmed speakers:
â?¢ Prof. Alexis Bell, UC-Berkeley, “Artificial Photosynthesis” â?¢ Dr. Joerg Jinschek, FEI “Aberration Corrected TEM” â?¢ Prof. Steven Quake, Stanford, “Bio-LSI & Microfluids” â?¢ Dr. Tom Albrecht, Hitachi Research, “Nano-Patterned Media” â?¢ Dr. Markus Beck, First Solar, Inc.,”Photovoltaics” â?¢ Prof. Roger Falcone, U. C. Berkeley/LBNL “ALS and Warm Dense Matter” Lunch Speaker: â?¢ Dr. Lewis Terman, IBM & past IEEE President, “IEEEâ??s 125th Anniversary/CCD Physics Prize”
For more information, and to register:

Seminar: Power Systems: 5 Topics To Help You Avoid Disaster

by @ 8:29 am. Filed under ALL, Electrical/Power, Engineering Mgmt

One-Day IAS Seminar
Power Systems: 5 Topics To Help You Avoid Disaster
— Friday, March 26, 2010 ? ? ? — Marriott Pleasanton
— Five Talks ? ? ? — Includes lunch, handouts, book, raffle entry
— 8:00AM Reg’n, Continental Breakfast ? — 8:30AM-4:40PM Talks & Lunch
Five presentations: ? – Assuring the Reliability of Critical Power Cable Systems ? – Seismic Vulnerability and Building Performance for Structures and MEP Equipment ? – OSHPD â?? Certification and Seismic Qualification ? – Overview of IEEE Standard 142-2007, Recommended Practice for Grounding of Industrial and Commercial Power Systems (The Green Book) ? – High Resistance Grounding for Specific Applications ? … plus a Mini Trade Show. ? $25 discount for additional registrations (though March 15)
Register early, to assure a seat:

Conf: International Symposium on Quality Electronic Design

by @ 8:27 am. Filed under ALL, Computers/Software, Electronics Design, Engineering Mgmt, Semiconductors

“Leading Electronics Design for Quality and Manufacturability”
International Symposium on Quality Electronic Design
— March 22-24, 2010 ? ? — DoubleTree Hotel, San Jose
— 6 Tutorials ? — Sessions (135 papers) ? — Keynotes ? — Exhibits
Technical Sessions: ? – SRAM Design for Quality ? – Mixed Signal and Power Control Circuits ? – Analog Design For Reliability ? – Lithography & DFM ? – Power & Performance Issues ? – Parametric and Delay Test ? – Package & IC Co-Design ? – Advances in Power Distribution, Placement and Routing ? – System-level NoC, SoC and ASIC design ? â?¦ and more
Full-day Tutorials: ? — Beyond 32 nm Technology ? — Energy Efficient Digital Circuit Design ? — Alternate Memories ? — SOC Verification ? — 3-D CAD Design ? — Microprocessor Architecture Impacts on Power
Full information and registration:

Job: Assistant Professor Tenure-Track Position

by @ 8:26 am. Filed under ALL, Communications, Electronics Design

San Jose State University — Electrical Engineering Department
Assistant Professor Tenure-Track Position
The Electrical Engineering Department at San Jose University invites applications for a tenure track assistant/associate professor position with specialization in Analog Mixed Signals (JOID: 13740). Applicants must hold a PhD or equivalent degree in Electrical Engineering with research emphasis in Analog Mixed Signal Circuits Analysis and Synthesis (industry experience in analog mixed-signal circuit design and test is desirable). The selected candidate will teach undergraduate and graduate Electrical Engineering courses, conduct research and develop courses and labs in area of expertise. Download full description.
For consideration, send a letter of application (referring JOID number), curriculum vitae, statement of teaching interests/philosophy, research plans, and letters from at least three references by March 15, 2010 to:
Dr. Avtar Singh, Chair, Electrical Engineering Department,
San José State University, One Washington Square, San José, CA 95192

Conf: Asia-Pacific Symposium on Electromagnetic Compatibility

by @ 8:22 am. Filed under ALL, Communications, Electronics Design, Engineering Mgmt, Semiconductors

Asia-Pacific Symposium on Electromagnetic Compatibility
— April 12-16, 2010 ? ? ? — Beijing, China ? ? — 60 Sessions
— 18 Invited Sessions ? ? — 3 Topical Meetings ? ? — 14 Workshops & Tutorials
— with Exhibition on EMC RF/Microwave Measurement & Instrumentation
This international symposium covers the entire scope of electromagnetic compatibility. Sessions on: ? – EMC Management ? – EMC Measurement Techniques ? – EMC Standards & Regulations ? – EM Environment ? – Lightning Protection ? – Power System EMC and High Power EMC ? – System-Level EMC and Protection ? – Transportation EMC ? – Antenna and Wave Propagation ? – PCB & Electronic Packaging EMC and SI ? – Semiconductor Device and IC EMC ? – Signal Integrity and Power Integrity ? – Wireless Communication EMC ? – Computational Electromagnetics ? – Bio-Medical Electromagnetics ? – Nanotechnology for EMC
For full Workshop and Tutorial details and Advance Program:

Mtg: MMIC Design for Next-Generation Digital Radio Systems

by @ 8:20 am. Filed under ALL, Communications, Electronics Design, Semiconductors

THURSDAY March 11, 2010
SCV Microwave Theory and Techniques Chapter
Speaker: Seyed Tabatabaei, Endwave
Time: Refreshments and Social at 6:00 PM; Presentation at 6:30 PM
Cost: none
Place: Agilent Technologies, Main Building, Aristotle Room, 5301 Stevens Creek Blvd, Santa Clara
RSVP: not required

This presentation will cover MMIC design for next generation digital radio systems.? It will present techniques in designing MMICs unique to this area and provide detail on VCO, Mixer and PA MMIC design.

Mtg: Effects of Broadband Policy and Network Neutrality on Innovation at the Edge and in the Cloud

by @ 8:19 am. Filed under ALL, Communications, Engineering Mgmt

WEDNESDAY March 10, 2010
SCV Communications Chapter
Speaker: William B. Wilhelm, Jr., Bingham McCutchen LLP
Time: Fast food at 6:00 PM; Presentation at 6:30 PM
Cost: $2 requested for food
Place: National Semiconductor, Building E, Conference Room, 2900 Semiconductor Dr, Santa Clara
RSVP: by email to by Monday, March 8th

The Federal Communications Commission (FCC) is prepared to issue a report to Congress on March 17th regarding a national broadband plan.? This presentation will provide perspective on the key policy objectives that the Plan (more…)

Mtg: 3D IC Integration: The Next Generation of Electronics

by @ 8:18 am. Filed under ALL, Communications, Electronics Design, Engineering Mgmt, Semiconductors

WEDNESDAY March 10, 2010
SCV Components, Packaging and Manufacturing Technology Chapter
Speaker: Dr. W. R. Bottoms, Chairman, Third Millennium Test Solutions (3MTS)
Time: Dinner at 6:00 PM; Presentation at 6:45 PM (note new times!)
Cost: $20 if reserved by March 8; $25 after & at door; vegetarian available; no cost for presentation only
Place: Biltmore Hotel, 2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara
RSVP: Through the website link

The semiconductor industry has followed a path defined by Moore’s Law for 40 years.? This has resulted in unprecedented progress but we are clearly nearing the end of Moore’s Law scaling.? The concept of equivalent (more…)

Mtg: Seismic Certification of Electrical Equipment and OSHPD: Round Table

by @ 8:17 am. Filed under ALL, Electrical/Power

TUESDAY March 9, 2010
SF Industry Applications Chapter?
Speakers: Jim Avery, IEM; John Boro, Cummins West; Bob Formicola, Energy Systems; Jim Hoyt, Harold Wells Associates; Armen Kludjian, Peterson Power Systems; Moderator: George Puffett, Cammisa & Wipf Consulting Engineers
Time: Social at 5:30 PM; Presentation at 6:00 PM; dinner at 7:00 PM
Cost: $30 at the door; $10 for IEEE Student Members
Place: Sinbadâ??s Restaurant, Pier 2 The Embarcadero, San Francisco
RSVP: By email to Frank Sylvester,, 415.554.1578

A panel of representatives from various manufacturers of various electrical equipment, and a structural engineer involved with developing seismic certification approvals. Panel members include the following individuals: (more…)

Mtg: Landing a Consulting Job Using Three Critical Questions

by @ 8:15 am. Filed under ALL, Communications, Computers/Software, Electrical/Power, Electronics Design

TUESDAY March 9, 2010
SCV Consultants’ Network of Silicon Valley
Speaker: Fred Schenkelberg, FMS Reliability
Time: Presentation at 7:00 PM
Cost: none
Place: KeyPoint Credit Union, 2805 Bowers Ave., Santa Clara
RSVP: Not required

The initial interview with a potential client is always important.? First impressions can make or break the deal.? This interview should allow you to understand the project’s objectives and the importance of the results.? Asking (more…)

Mtg: An Overview of Chip-Level EMC Problems

by @ 8:13 am. Filed under ALL, Electronics Design, Semiconductors

TUESDAY March 9, 2010
SCV Electromagnetic Compatibility Chapter
Speaker: Dr. Sergiu Radu, Sun Microsystems, and 2009-2010 IEEE EMC Society Distinguished Lecturer
Time: Light dinner and networking at 5:30 PM; Presentation at 6:30 PM
Cost: Light Dinner and beverages will be served for a fee
Place: Applied Materials Bowers Cafeteria, 3090 Bowers Ave., Santa Clara
RSVP: Not required

The CPUs and the VLSI chips are the primary sources of electromagnetic noise in all electronic equipments.? Reducing the electromagnetic noise at source level is usually the best and the most economical solution.? The (more…)

Mtg: GPU Computing: Past, Present and Future with ATI Stream Technology

by @ 8:12 am. Filed under ALL, BioEngineering, Computers/Software, Engineering Mgmt

TUESDAY March 9, 2010
SCV Computer Chapter
Speaker: Michael Monkang Chu, ATI Stream, AMD
Time: Fast food and networking at 6:30 PM; Presentation at 7:00 PM
Cost: $2 donation for food
Place: Microsoft Research, 1288 Pear Ave., Mountain View
RSVP: Through the EventBrite link

As GPUs have transformed from their traditional fixed-function pipeline roots to the highly programmable parallel-processing engines of today, more and more programmers have been drawn to the allure of harnessing the massive amount of computational capacity available in these processors.? What started out as an experimental domain for researchers has turned into one of the most sought after acceleration technologies for application developers and end users alike.? Now that industry-standard interfaces, such as OpenCLâ?¢, have emerged, programmers are beginning to incorporate GPU compute acceleration into their applications to take advantage of the large number of GPUs already available in systems today.
In this talk we will look back at the birth of GPU compute, and the hardware and software advances that made it possible.? We will take a moment to examine the industry-standard programming languages available today and the high-performance graphics hardware that powers those interfaces.? Finally, we will take a brief look into the future of truly heterogeneous computing, when CPU and GPU technologies begin to merge.

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