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May 18, 2010

Mtg: Ultra-Low-Voltage VLSI Design for Minimum-Energy Computing

by @ 3:48 pm. Filed under ALL, Electronics Design, Engineering Mgmt, NanoEngineering, Semiconductors
 

Monday June 21, 2010
SCV Circuits and Systems Chapter
Speaker: Massimo Alioto, Ph.D, Visiting Professor, UC-Berkeley
Time: Networking and light dinner at 6:30 PM; Presentation at 7:00 PM
Cost: $2 donation accepted for food
Place: QualComm, Building B, 3165 Kifer Road, Santa Clara
RSVP: not required
Web: ewh.ieee.org/r6/scv/cas

In the last years, subthreshold CMOS logic circuits have become very popular in ultra low power applications, which typically constrain the power budget to a few tens of uWs and the supply (more…)

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