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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

June 7, 2010

Mtg: Mobile Visual Search

by @ 7:27 am. Filed under ALL, Communications, Computers/Software, Optics/Displays

THURSDAY June 10, 2010
SCV Computational Intelligence Chapter
Speaker: Professor Bernd Girod, Stanford University
Time: 6:30 PM
Cost: none
Place: Carnegie Mellon Silicon Valley, Bldg.23, Room 118, Moffett Field
RSVP: not required

Handheld mobile devices, such as camera phones or PDAs, are expected to become ubiquitous platforms for visual search and mobile augmented reality applications.? A visual database for mobile image (more…)

Webinar: High-Skills Immigration Reform Update

by @ 7:26 am. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt

THURSDAY June 10, 2010
IEEE-USA Corporate Management Webinar Series
Instructor: Russ Harrison, IEEE-USA Lobbyist
Time: 11:00 AM – Noon
Cost: none
Place: on the Internet
RSVP: Sign up in advance, from the website

Mtg: Wireless Sensor Networks + Challenges of WiFi Interoperability Testing and Performance Measurements

by @ 7:25 am. Filed under ALL, Communications, Electronics Design, Engineering Mgmt

WEDNESDAY June 9, 2010
SCV Commmunications Chapter
Speakers: Murat Senel, Bosch Research and Technology Center LLC; Farouk Zanaty, Wi-PerforMax Inc
Time: Cheese, crackers, drinks and Networking at 6:00 PM; Presentation at 6:30 PM
Cost: none
Place: National Semiconductor, Building E, Conference Room, 2900 Semiconductor Dr, Santa Clara
RSVP: Through the website link

The “Internet of Things” refers to the posibility of connecting sensors, actuators or any device to the Internet. It can lead to a significant change in the way we live and interact with the devices (home appliances, smart meters, HVAC systems, thermostats, etc.) in our daily lives and can open-up a lot of business opportunities.? Since proprietary solutions are difficult to manage and interface as the scale grows and many devices need to be networked, standardized technologies are prefered over proprietary protocols.? IP seems to be the most appropriate layer to achieve this coherence. This potential was also recognized by different organizations in industry as well as in academia, and different efforts are on the way: IPSO (IP for Small Objects) consortium is trying to push IP to sensors for Internet connectivity, 6LoWPAN (IPv6 over Low-Power Wireless Area Networks) is being developed to cater IP for the specific needs of wireless sensors, and some companies are pushing the power consumption of Wi-Fi lower and lower to guarantee years of battery lifetime, although traditionally ZigBee and IEEE 802.15.4 have been regarded as the upper and lower communication layers in this field.? In this talk, we’ll give an overview of this domain from our point of view and present the pros and cons of two specific approaches: i) 6LoWPAN on IEEE802.15.4 and ii) Wi-Fi for sensor networks. (plus second talk.)

Mtg: Novel Fine Pitch, Low Profile, Low Cost Connector Technology

by @ 7:23 am. Filed under ALL, Electronics Design, Semiconductors

WEDNESDAY June 9, 2010
SCV Components, Packaging and Manufacturing Technology, with Electromagnetic Compatability Chapters
Speaker: David Light, VP Technology, Neoconix, Inc.
Time: Dinner at 6:00 PM; Presentation at 6:45 PM
Cost: $20 if reserved by June 7 ($10 for students, unemployed); $25 after & at door; vegetarian available; no cost for presentation only
Place: Biltmore Hotel, 2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara
RSVP: Through the website link

This talk will present a revolutionary connector technology providing unparalleled design flexibility at low cost.? A photolithographic approach to connector definition coupled with batch, printed (more…)

Mtg: Robotics for Electronics Manufacturing

by @ 7:21 am. Filed under ALL, Computers/Software, Electronics Design, Engineering Mgmt, Semiconductors

TUESDAY June 8, 2010
SCV Consultants’ Network of Silicon Valley
Speaker: Karl Mathia, Zitech Engineering, LLC
Time: Social at 5:30 PM; Dinner at 6:30 PM; Presentation at 7:30 PM
Cost: $28 for dinner
Place: Del Monte Restaurant, 100 South Murphy Ave., Sunnyvale
RSVP: from the website, by 8 AM on June 8

At this talk, CNSV member Karl Mathia will introduce his new Cambridge University Press book Robotics for Electronics Manufacturing: Principles and Applications in Cleanroom Automation.? Karl will provide insight into the unique technical challenges posed by design, test, and applications of cleanroom robotics for electronics manufacturing — in particular semiconductor manufacturing, the most challenging cleanroom manufacturing application.
Dr. Mathia will describe industrial robotics, cleanroom robots, the design of atmospheric and vacuum robots, and common kinematic structures.? He will also cover early substrate-handling robots, how current cleanroom automation technology evolved over time, and some future trends.
A real-world example will illustrate the design of substrate-handling robots for vacuum environments, and how their quality can be maximized and expensive design pitfalls avoided.? The importance of industry standards and de-facto standards for robotic systems will be addressed as well.

Mtg: 48-Core Cloud Computer Chip

by @ 7:19 am. Filed under ALL, Computers/Software, Electronics Design, Engineering Mgmt, Semiconductors

TUESDAY June 8, 2010
SCV Computer, with Solid State Circuits Chapters?
Speaker: Jason Howard, Senior Technical Researcher, Intel
Time: Networking with food and beverage at 6:30 PM; Presentation at 7:00 PM
Cost: $2 donation helps cover food
Place: National Semiconductor, Building E Conference Center, 2900 Semiconductor Drive, Santa Clara
RSVP: Via EventBrite link:

In this talk, Jason Howard describes a processor integrating 48 IA-32 cores, 4 DDR3 memory channels, and a voltage regulator controller in a 6Ã?4 2D-mesh network-on-chip architecture.? Located at each mesh node is a five-port virtual cut-through packet switched router shared between two cores.? Core-to-core communication uses message passing while exploiting 384KB of on-die shared memory.? Fine grain power management takes advantage of 8 voltage and 28 frequency islands to allow independent DVFS of cores and mesh.? At the nominal 1.1V, cores operate at 1GHz while the 2D-mesh operates at 2GHz.? As performance and voltage scales, the processor dissipates between 25W and 125W.? The 567mm2 processor is implemented in 45nm Hi-K CMOS and has 1,300,000,000 transistors.

Mtg: New Driving Force for Electromigration in ULSI Interconnections and its Implication to IC Layout

by @ 7:14 am. Filed under ALL, Electronics Design, NanoEngineering, Semiconductors

MONDAY June 7, 2010
SCV Electron Devices Chapter
Speaker: Dr. Cher Ming Tan, School of EEE, Nanyang Technological University, Singapore
Time: Pizza/drinks at 6:00 PM; Presentation at 6:15 PM
Cost: none
Place: National Semiconductor, Building E1, Conference Center, 2900 Semiconductor Drive, Santa Clara
RSVP: not required

Interconnections are crucial to the operation of any integrated circuit as they provide networking for the billions of transistors in an IC.? As the technology node advances, transistors are getting smaller (more…)

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