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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

July 28, 2010

Mtg: Controlling Light Propagation at the Nanometer Scale by Novel Plasmonic and Dielectric Devices

by @ 5:47 pm. Filed under ALL, Electronics Design, Engineering Mgmt, NanoEngineering, Optics/Displays, Semiconductors
 

TUESDAY August 17, 2010
SCV Nanotechnology Chapter
Speaker: Jingjing Li, Information and Quantum Systems Lab, Hewlett-Packard Laboratories
Time: Registration & light lunch 11:30 AM; Presentation at 12:00 Noon
Cost: IEEE Members and Students $5; Non-Members $10
Place: National Semiconductor Bldg E-1 CMA Room. 2900 Semiconductor Drive, Santa Clara
RSVP: from the website
Web: www.ieee.org/nano

Controlling the propagation and localization of light at the sub-wavelength dimension is the basis of the design of many optical devices widely used in engineering and fundamental science (more…)

Mtg: How to Be an Effective Technical Consultant by Speaking the Language of Business

by @ 12:04 pm. Filed under ALL, BioEngineering, Communications, Computers/Software, Electronics Design, Engineering Mgmt, NanoEngineering
 

TUESDAY September 14, 2010
SCV Consultants’ Network of Silicon Valley
Speaker: John Levy, John Levy Consulting
Time: Networking and EnCorps overview at 6:45 PM; Presentation at 7:00 PM
Cost: none
Place: KeyPoint Credit Union, 2805 Bowers Ave., Santa Clara
RSVP: not required
Web: www.CaliforniaConsultants.org

Selling your services and being an effective consultant both require technologists to be clearly understood by non-technical business people. Insuring you are understood involves the following (more…)

July 27, 2010

Mtg: Silicon Photonics: Opportunities & Challenges

by @ 8:40 pm. Filed under ALL, Communications, Electronics Design, NanoEngineering, Optics/Displays, Semiconductors
 

MONDAY September 20, 2010
SCV Circuits and Systems Chapter
Speaker: Dr. Haisheng Rong, Senior Scientist, Intel Labs
Time: Networking/light dinner at 6:30 PM; Presentation at 7:00 PM
Cost: $2 donation accepted for food
Place: QualComm Santa Clara, Building B, 3165 Kifer Road, Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/cas

Silicon photonics technology offers promising low-cost optoelectronic solutions for many applications ranging from optical communications to emerging areas such as optical sensing and (more…)

Mtg: Ultra-Low-Voltage VLSI Design for Minimum Energy Computing

by @ 8:32 pm. Filed under ALL, Computers/Software, Electronics Design, Engineering Mgmt, NanoEngineering, Semiconductors
 

WEDNESDAY September 1, 2010
SCV Circuits and Systems Chapter
Speaker: Massimo Alioto, Ph.D, Visiting Professor at BWRC — UC-Berkeley
Time: Networking/light dinner at 6:30 PM; Presentation at 7:00 PM
Cost: $2 donation accepted for food
Place: QualComm Santa Clara, Building B, 3165 Kifer Road, Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/cas

In the last years, subthreshold CMOS logic circuits have become very popular in ultra low power applications, which typically constrain the power budget to a few tens of (more…)

Webinar – The Smart Grid: From Appliance to Generator and Back

by @ 7:34 pm. Filed under ALL, Communications, Electrical/Power, Engineering Mgmt
 

WEDNESDAY September 8, 2010
IEEE SF Bay Area Council, with Region 6 and Oregon Section
Speakers: Saifur Rahman, Virginia Tech; Dmitry Kosterev and Joe Andres, BPA; Rob Pratt, Steve Widergren and Dave McKinnon, PNNL; Jeff Hammarlund and Linda Rankin, Portland State University
Time: 8:00 AM – 5:00 PM
Cost: $99 for IEEE members; $150 for non-members, $25 for full-time students
Place: on the Internet
RSVP: From the flyer
Web: www.e-grid.net/docs/1009-smartgrid.pdf

Join us in this one-day workshop which provides a systems view of how the Smart Grid provides interactions between the end uses of electricity (“appliances” or industrial (more…)

Mtg: 3-D ICs: Motivation, Performance Analysis, Technology and Applications

by @ 3:33 pm. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt, Optics/Displays, Semiconductors
 

TUESDAY August 10, 2010
SCV Electron Devices Chapter
Speaker: Dr. Krishna C. Saraswat, Dept. of Electrical Engineering, Stanford University
Time: Networking with pizza at 6:00 PM; Presentation at 6:15 PM
Cost: none
Place:National Semiconductor, Building E1, Conference Center, 2900 Semiconductor Drive, Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/eds

For more than 40 years, the performance of silicon integrated circuits has improved at an astonishing rate. The unprecedented growth of the computer and the information technology industry is (more…)

Mtg: Good Things Come in Small (IC) Packages

by @ 2:34 pm. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt, Semiconductors
 

THURSDAY October 28, 2010
SCV Components, Packaging and Manufacturing Technology Chapter
Speaker: Sandra Winkler, New Venture Research
Time: Registration & social at 11:30 AM; Optional lunch at 11:45 AM; Presentation at 12:15 PM
Cost: $15 for lunch; Students & unemployed members $5 (no cost for presentation-only)
Place: Biltmore Hotel, 2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara
RSVP: From the website
Web: www.cpmt.org/scv

The semiconductor industry has experienced strong growth in 2010, despite a weak and uncertain economy.? Inexpensive ($300-400 and under) consumer electronics products are the driving force of (more…)

July 23, 2010

Mtg: Vacuum Nanoelectronics: The Ideal Technology for Terahertz Applications?

by @ 10:30 am. Filed under ALL, Communications, Electronics Design, Engineering Mgmt, NanoEngineering, Semiconductors
 

THURSDAY August 19, 2010
SCV Solid State Circuits Chapter
Speaker: Prof. Thomas H. Lee, Stanford University
Time: Networking/refreshments at 6:00 PM; Presentation at 6:30 PM
Cost: none
Place: National Semiconductor Building E Auditorium, 2900 Semiconductor Dr., Santa Clara
RSVP: not required
Web: ewh.ieee.org/mu/scv-sscs

The decade of frequencies centered around a terahertz represents the â??last??? frontier for electronics.? Compelling applications have been known for decades, but no generally suitable technologies yet exist.? The problem (more…)

Mtg: Entrepreneurship in Photonics

by @ 10:15 am. Filed under ALL, BioEngineering, Engineering Mgmt, Optics/Displays
 

TUESDAY August 3, 2010
SCV Photonics Chapter
Speaker: Dr. Larry R. Marshall, Southern Cross Ventures
Time: Networking with food and beverage at 6:00 PM; Presentation at 7:00 PM
Cost: none
Place: National Semiconductor Building E Auditorium, 2900 Semiconductor Drive, Santa Clara
RSVP: required – from the website
Web: ewh.ieee.org/r6/scv/leos

Dr. Larry R. Marshall came to the US from Australia in the late 80’s – after getting on-the-job management training at Fibertek, he started his first company with no idea of who the customer was, or (more…)

Mtg: Multicore Programming: Pitfalls and Solutions

by @ 9:06 am. Filed under ALL, Computers/Software, Engineering Mgmt
 

TUESDAY September 14, 2010
SCV Computer Chapter, with ACM Chapter
Speaker: Madan Musuvathi, Researcher, Microsoft Research
Time: Networking with food and beverage at 6:30 PM; Presentation at 7:00 PM
Cost: $2 donation for food
Place: Microsoft Research (use rear/North door), 1288 Pear Ave., Mountain View
RSVP: required – from the website
Web: multicore.eventbrite.com

A big impediment in developing and maintaining concurrent software is our inability to effectively deal with race conditions.? These â??Heisenbugs??? are hard to find.? Even when found, they (more…)

Webinar: Creative Thinking and Innovation

by @ 8:34 am. Filed under ALL, BioEngineering, Communications, Computers/Software, Electrical/Power, Electronics Design, Engineering Mgmt, NanoEngineering, Optics/Displays, Semiconductors
 

TUESDAY August 3, 2010
IEEE-USA
Speaker: Ann Herrmann-Nehdi
Time: 11:00 AM to 12:00 PM Noon
Cost: none
Place: on the internet
RSVP: from the website
Web: www.ieeeusa.org/careers/webinars

This highly interactive webinar will introduce practical tools and techniques for improving processes and team dynamics to maximize creativity, generate innovative ideas and (more…)

Mtg: SPMT (Serial Port Memory Technology) Panel

by @ 8:18 am. Filed under ALL, Communications, Electronics Design
 

TUESDAY July 27, 2010
SCV Consumer Electronics Chapter
Speakers: Jim Venable, President, SPMT Consortium, plus speakers from ARM, Hynix, Marvell, Samsung, and Silicon Image
Time: Social at 6:00 PM; Presentations at 6:30 PM; Drinks and food at 7:45 PM
Cost: IEEE Members $5; Non-Members $10
Place: Marvell Semiconductor, Inc., 5488 Marvell Lane, Santa Clara
RSVP: from the website
Web: ewh.ieee.org/r6/scv/ce

Webinar: The Small Business Administration and Innovation

by @ 8:17 am. Filed under ALL, BioEngineering, Communications, Computers/Software, Electrical/Power, Electronics Design, Engineering Mgmt, NanoEngineering
 

TUESDAY July 27, 2010
IEEE-USA
Speakers: Max Summers and John Gann, Small Business Administration
Time: 11:00 AM to 12:00 PM Noon
Cost: none
Place: on the internet
RSVP: from the website
Web: www.ieeeusa.org/careers/webinars

July 16, 2010

Mtg: Legal Documents 101: Everything You Need to Know to Operate a Successful Consulting Practice

by @ 6:20 pm. Filed under ALL, Communications, Computers/Software, Electronics Design, NanoEngineering
 

FRIDAY July 23, 2010
SCV Consultants’ Network of Silicon Valley
Speakers: Jonathan Sweet, JD; Lonnie Finkel, JD
Time: 8:30 AM to 12:30 PM
Cost: IEEE Members $47; Non-Members $67
Place: Cogswell Polytechnical College, 1175 Bordeaux Drive, Sunnyvale (also as a Webinar)
RSVP: required – from the website
Web: legaldocs101-svec0706.eventbrite.com

Mtg: A Picture is Worth a Thousand (DRC) Rules

by @ 6:20 pm. Filed under Electronics Design, Engineering Mgmt, NanoEngineering, Semiconductors
 

TUESDAY July 20, 2010
SCV Nanotechnology Chapter
Speaker: Michael White, Sr Product Manager, Calibre Physical Verification Products, Mentor Graphics
Time: Registration & light lunch at 11:30 AM; Presentation at 12:00 Noon
Cost: IEEE Members and Students $5; Non-Members $10
Place: National Semiconductor Bldg E-1 CMA Room. 2900 Semiconductor Drive, Santa Clara
RSVP: required – from the website
Web: www.ieee.org/nano

New manufacturing issues have a huge effect on how we do IC physical verification at the leading nodes.? Design rule checking has changed from simple one-dimensional spacing and width checks to complex 3D geometrical functions covering (more…)

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