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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

July 27, 2010

Mtg: Silicon Photonics: Opportunities & Challenges

by @ 8:40 pm. Filed under ALL, Communications, Electronics Design, NanoEngineering, Optics/Displays, Semiconductors
 

MONDAY September 20, 2010
SCV Circuits and Systems Chapter
Speaker: Dr. Haisheng Rong, Senior Scientist, Intel Labs
Time: Networking/light dinner at 6:30 PM; Presentation at 7:00 PM
Cost: $2 donation accepted for food
Place: QualComm Santa Clara, Building B, 3165 Kifer Road, Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/cas

Silicon photonics technology offers promising low-cost optoelectronic solutions for many applications ranging from optical communications to emerging areas such as optical sensing and (more…)

Mtg: Ultra-Low-Voltage VLSI Design for Minimum Energy Computing

by @ 8:32 pm. Filed under ALL, Computers/Software, Electronics Design, Engineering Mgmt, NanoEngineering, Semiconductors
 

WEDNESDAY September 1, 2010
SCV Circuits and Systems Chapter
Speaker: Massimo Alioto, Ph.D, Visiting Professor at BWRC — UC-Berkeley
Time: Networking/light dinner at 6:30 PM; Presentation at 7:00 PM
Cost: $2 donation accepted for food
Place: QualComm Santa Clara, Building B, 3165 Kifer Road, Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/cas

In the last years, subthreshold CMOS logic circuits have become very popular in ultra low power applications, which typically constrain the power budget to a few tens of (more…)

Webinar – The Smart Grid: From Appliance to Generator and Back

by @ 7:34 pm. Filed under ALL, Communications, Electrical/Power, Engineering Mgmt
 

WEDNESDAY September 8, 2010
IEEE SF Bay Area Council, with Region 6 and Oregon Section
Speakers: Saifur Rahman, Virginia Tech; Dmitry Kosterev and Joe Andres, BPA; Rob Pratt, Steve Widergren and Dave McKinnon, PNNL; Jeff Hammarlund and Linda Rankin, Portland State University
Time: 8:00 AM – 5:00 PM
Cost: $99 for IEEE members; $150 for non-members, $25 for full-time students
Place: on the Internet
RSVP: From the flyer
Web: www.e-grid.net/docs/1009-smartgrid.pdf

Join us in this one-day workshop which provides a systems view of how the Smart Grid provides interactions between the end uses of electricity (“appliances” or industrial (more…)

Mtg: 3-D ICs: Motivation, Performance Analysis, Technology and Applications

by @ 3:33 pm. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt, Optics/Displays, Semiconductors
 

TUESDAY August 10, 2010
SCV Electron Devices Chapter
Speaker: Dr. Krishna C. Saraswat, Dept. of Electrical Engineering, Stanford University
Time: Networking with pizza at 6:00 PM; Presentation at 6:15 PM
Cost: none
Place:National Semiconductor, Building E1, Conference Center, 2900 Semiconductor Drive, Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/eds

For more than 40 years, the performance of silicon integrated circuits has improved at an astonishing rate. The unprecedented growth of the computer and the information technology industry is (more…)

Mtg: Good Things Come in Small (IC) Packages

by @ 2:34 pm. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt, Semiconductors
 

THURSDAY October 28, 2010
SCV Components, Packaging and Manufacturing Technology Chapter
Speaker: Sandra Winkler, New Venture Research
Time: Registration & social at 11:30 AM; Optional lunch at 11:45 AM; Presentation at 12:15 PM
Cost: $15 for lunch; Students & unemployed members $5 (no cost for presentation-only)
Place: Biltmore Hotel, 2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara
RSVP: From the website
Web: www.cpmt.org/scv

The semiconductor industry has experienced strong growth in 2010, despite a weak and uncertain economy.? Inexpensive ($300-400 and under) consumer electronics products are the driving force of (more…)

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