IEEE S.F. Bay Area Council e-GRID's

Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

September 24, 2010

Mtg: Development and Application of Accelerated Test Methods Specific to CPV Systems

by @ 10:24 am. Filed under ALL, Electrical/Power, Electronics Design, Engineering Mgmt, Optics/Displays, Semiconductors

WEDNESDAY September 29, 2010
SCV Reliability Chapter
Speaker: Mark Spencer, Staff Reliability Engineer, SolFocus
Time: Social/refreshments at 6:30 PM; Presentation at 7:00 PM
Cost: none
Place: Hewlett Packard Oak Room, Bldg 48, 1911 Pruneridge Ave, Cupertino
RSVP: not required

SolFocus is currently involved in two separate accelerated test efforts to quantify the long term life of its SF1100 CPV (concentrator photovoltaic) product.? Results from these tests (more…)

Mtg: Smart TVs and other CE innovations from the Intel Developer Forum

by @ 10:22 am. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt, Semiconductors

TUESDAY September 28, 2010
SCV Consumer Electronics Chapter
Speakers: Mike Demler; and Tom Coughlin, President, Coughlin Associates
Time: Pizza and drinks at 6:30 PM; Presentations at 7:00 PM
Cost: IEEE members $5; non-members $10
Place: NVIDIA, 2800 Scott Blvd – Building E, Santa Clara
RSVP: EventBrite, from website

This will be a review of consumer electronics innovations on display at the recent Intel Developer Forum – including Google-TV, new tablet PCs based on MeeGo and Windows-7, and a (more…)

Mtg: The Makers of the Microchip: Creating the Planar IC, Establishing Silicon Valley

by @ 10:21 am. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt, NanoEngineering, Semiconductors

TUESDAY September 28, 2010
SCV Solid State Circuits, with Electron Devices and Computer Chapters
Speakers: David C. Brock, Senior Research Fellow, Center for Contemporary History and Policy, Chemical Heritage Foundation; Christophe Lecuyer, Principal Economic Analyst, Office of the President, University of California
Time: Presentations at 6:00 PM
Cost: none
Place: National Semiconductor Building E Auditorium, 2900 Semiconductor Dr., Santa Clara
RSVP: EventBrite, from website

In the first three and a half years of its existence, Fairchild Semiconductor developed, produced, and marketed the device that would become the fundamental building block of the (more…)

Mtg: What’s in Your Electronic Product, and Why Should a Product Safety Engineer be Concerned?

by @ 10:19 am. Filed under ALL, Communications, Electronics Design, Engineering Mgmt

TUESDAY September 28, 2010
SCV Product Safety Engineering Chapter
Speaker: Rick Row, Consultant
Time: Optional dinner at 5:30 PM; Presentation at 7:00 PM
Cost: no-host dinner at El Torito Mexican Restaurant; no cost for presentation
Place: Dinner at El Torito Mexican Restaurant, 2950 Lakeside Drive, Santa Clara; Meeting at Applied Materials, Bowers Café, 3090 Bowers Ave, Santa Clara
RSVP: not required

Three trends make mineral sourcing an issue of potentially compelling interest to product safety engineers.? First, many more minerals are used today in manufacturing electronics than just a (more…)

Mtg: Short Circuit, Device Coordination, and Arc Flash Analysis

by @ 10:18 am. Filed under ALL, Electrical/Power

TUESDAY September 28, 2010
SF Industry Applications Chapter
Speaker: Alberto Marroquin, P.E., Operation Technology, Inc
Time: Social at 5:30 PM; Presentation at 6:00 PM; Dinner at 7:00 PM
Cost: $30 (at the door); $10 for student members. Email pre-registration qualifies the registrant for our drawing of an IEEE Color Book at dinner.
Place: Sinbadâ??s Restaurant, Pier 2 The Embarcadero, San Francisco
RSVP: by email, to Frank Sylvester, SFPUC,, 415-554-1578

This presentation will introduce some on the latest trends in short-circuit and device coordination and their relationship to arc flash analysis.? The presentation will also cover some new (more…)

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