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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

October 9, 2010

Mtg: Mass Storage: What the Future Holds / CNSV Annual Meeting

by @ 11:27 am. Filed under ALL, Computers/Software, Electronics Design, Engineering Mgmt, NanoEngineering
 

TUESDAY December 14, 2010
SCV Consultants’ Network of Silicon Valley Chapter
Speaker: Tom Coughlin, Coughlin Associates
Time: 7:00 PM
Cost: none
Place: KeyPoint Credit Union, 2805 Bowers Ave., Santa Clara
RSVP: not required
Web: www.CaliforniaConsultants.org

Mass data storage for digital electronic systems plays a vital role in contemporary life, providing non-volatile and rapid data access for business, government, academic, military, and consumer (more…)

Seminar: How CNSV Members Market Their Consulting Services

by @ 11:14 am. Filed under ALL, BioEngineering, Communications, Computers/Software, Electronics Design, Engineering Mgmt
 

FRIDAY October 15, 2010
SCV Consultants’ Network of Silicon Valley
Speakers: Seven CNSV members
Time: 8:30 AM – 12:30 PM
Cost: $35 for IEEE Members; $40 for non-members
Place: on the Web, or live at Cogswell Polytechnical College, 1175 Bordeaux Drive, Sunnyvale
RSVP: see the web link
Web: ieeecnsv101510.eventbee.com/track/egrid

This seminar will consist of a panel of seven CNSV members, each of whom will discuss what they have done to continue finding consulting work in recent times.? Each of the presenters are doing (more…)

Mtg: 40/100 Gigabit Ethernet: Market Needs, Applications, and Standards

by @ 11:12 am. Filed under ALL, Communications, Electronics Design, Engineering Mgmt
 

WEDNESDAY October 13, 2010
SCV Communications Chapter
Speakers: John D’Ambrosia, Force10 Networks; Ilango Ganga, LAN Access Division, Intel
Time: Networking with Cheese, Crackers, Drinks at 6:00 PM; Presentations at 6:30 PM
Cost: none
Place: National Semiconductor, Building E, Conference Room, 2900 Semiconductor Dr, Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/comsoc

Ethernetâ??s Next Evolution â?? 40GbE and 100GbE
This talk will provide an overview of the Ethernet Eco-system and the applications within that drove the need for the development of IEEE Std. 802.3baTM-2010 40Gb/s and 100Gb/s Ethernet Standard.? Technology trends in computing and network aggregation and their role in driving the market need for 40GbE and 100GbE will be discussed.

The IEEE Std 802.3ba-2010 40Gb/s and 100Gb/s Architecture
This talk provides an overview of IEEE Std 802.3ba-2010 40Gb/s and 100Gb/s Ethernet specifications, objectives, (more…)

Mtg: Spacecraft and Surface Charging Mitigation

by @ 11:11 am. Filed under ALL, Communications, Electronics Design, Engineering Mgmt
 

TUESDAY October 12, 2010
SCV Electromagnetic Compatibility Chapter?
Speaker: Dr. Richard Briët, Aerospace Corporation
Time: Networking/light dinner (fee) at 5:30 PM; Presentation at 6:30 PM
Cost: fee for dinner; no charge for talk
Place: Applied Materials Bowers Cafeteria, 3090 Bowers Ave., Santa Clara
RSVP: not required
Web: ewh.ieee.org/r6/scv/emc

Dr. Briët will talk about Spacecraft and Surface charging with emphasis on practical applications of the current State of the Art of Spacecraft Charging Mitigation. For tonightâ??s Blue Light Specials, (more…)

Mtg: Is It the End of the Road for Silicon in Power Management?

by @ 11:09 am. Filed under ALL, Electrical/Power, Electronics Design, Semiconductors
 

TUESDAY October 12, 2010
SCV Electron Devices, with Power Electronics Chapter
Speaker: Dr. Alex Lidow, CEO, Efficient Power Conversion
Time: Networking with pizza at 6:00 PM; Presentation at 6:15 PM
Cost: none
Place: National Semiconductor, Building E-1, Conference Center, 2900 Semiconductor Drive, Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/eds

Gaillium Nitride is showing performance, reliability, and cost capability to displace silicon for power management.? For the past three decades, power management efficiency and cost have shown steady improvement as (more…)

Mtg: All-Silicon System with Nano-Packaging: Highest Functionality, Lowest Cost, Smallest Size

by @ 11:07 am. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt, Optics/Displays, Semiconductors
 

TUESDAY October 12, 2010
SCV Components, Packaging and Manufacturing Technology Chapter
Speaker: Prof. Rao Tummala, Founding Director, NSF Packaging Research Center, Georgia Tech
Time: Optional dinner at 6:00 PM; Presentation at 6:45 PM
Cost: $20 for dinner; Students & unemployed members $10 (no cost for presentation-only)
Place: Biltmore Hotel, 2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara
RSVP: From the website
Web: www.cpmt.org/scv

Nanopackaging has been defined as the process of interconnecting, powering, cooling, and protecting the nanocomponents made of nanomaterials to form electronic and bioelectronic systems for greatly improved (more…)

Seminar: Moore’s Law for System Integration

by @ 11:05 am. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt, Optics/Displays, Semiconductors
 

TUESDAY October 12, 2010
SCV Components, Packaging and Manufacturing Technology Chapter
Speaker: Prof. Rao Tummala, Founding Director, NSF Packaging Research Center, Georgia Tech, past President of CPMT Society & IEEE Fellow
Time: Preregistration at 2:45 PM; Seminar from 3:00 – 5:00 PM; Optional dinner at 6:00 PM (see below)
Cost: $25 for IEEE members, $35 for non-members, $10 for full-time students/unemployed
Place: Biltmore Hotel, 2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara
RSVP: From the website
Web: www.cpmt.org/scv

Electronics has been and continues to be one of the largest global industries, with $1.4T market value.? It has been the driving engine for science, engineering and manufacturing, leading to the global prosperity in those (more…)

Mtg: High Performance Computing: Union of Software and Reconfigurable Logic

by @ 11:04 am. Filed under ALL, Communications, Computers/Software, Electronics Design
 

TUESDAY October 12, 2010
SCV Computer Chapter
Speaker: Ivo Bolsens, Senior VP and CTO, Xilinx
Time: Networking with food and beverage at 6:30 PM; Presentation at 7:00 PM
Cost: $2 donation for food
Place: Microsoft Research (use rear/North door), 1288 Pear Ave., Mountain View
RSVP: required – from the website
Web: fastcomputing.eventbrite.com

Modern FPGA platforms have capabilities that are well suited to assume a more central role in the implementation of complex embedded processing systems.? In particular, FPGAs are well placed to be at the heart (more…)

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