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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

September 30, 2011

Printed Electronics USA Conference

by @ 3:56 pm. Filed under ALL, Electronics Design, Engineering Mgmt, NanoEngineering, Semiconductors
 

Eigth Annual Printed Electronics USA Conference
– November 29 – December 2, 2011 ? – Santa Clara Convention Center
– The world’s largest and most comprehensive event on the new electronics
Printed Electronics is one of the fastest growing technologies in the world. Electronics can be used in places it has never been before, with new exciting form factors.
Over 100 world-class speakers cover components, materials and applications in the following areas: ? – ? – CdTe Solar Cells ? – Thin/Flexible Batteries ? – Conformal/Flexible Displays ? – E-readers ? – Digital Printing ? – Conductive Materials ? – Graphene Carbon Nanotubes ? – Organic Photovoltaics ? – Dye-sensitized Solar Cells ? – National Solar Incentives ? – Market analysis & forecasts … ? plus 10 Master Classes on Nov. 29, Dec. 2 ? – Investment Summit ? Co-located with Photovoltaics USA — one registration includes both events. Use code “IEEE25” for a 25% discount.
For more information: www.IDTechEx.com/peUSA

Int’l Symposium for Testing and Failure Analysis

by @ 3:52 pm. Filed under ALL, Electronics Design, NanoEngineering, Optics/Displays, Semiconductors
 

North America’s largest trade show of FA-related equipment and services
37th Int’l Symposium for Testing and Failure Analysis
— November 13-17, 2011 ? ? — San Jose Convention Center
— Sessions: Tues-Thurs, Nov 15-17 ? ? — Exposition: Tues-Wed, Nov 15-16
Theme: “Finding the Invisible Defect.” ? ISTFA’11 combines technical sessions, tutorials, an exhibition, and user group meetings with a focus on making the full experience a strong benefit for the attendee.
Sessions: ? – Packaging- and Assembly-Level FA ? – Defect Characterization & Metrology ? – FA Process/Case Histories ? – Sample Preparation ? – Alternative Energy ? – Photon-Based Techniques ? – Board and System Level FA ? – EMS, Discretes and Optoelectronic Device FA ? – and more, plus Panel Discussion, Poster Papers.
Also Tutorials, Short Courses, exhibits. ? Register by October 7 รข?? Save up to $125.
Registration now open … ? www.ISTFA.org

Symposium on Energy Efficient Electronic Systems

by @ 3:44 pm. Filed under ALL, Electronics Design, NanoEngineering, Semiconductors
 

Sponsored by NSF
Symposium on Energy Efficient Electronic Systems
– November 3-4, 2011 ? – Banatao Auditorium, UC-Berkeley
Speakers from: IBM, ASIT, SuVolta, EPFL, UC-Berkeley, MIT, Stanford, U-Illinois, NC State, Tohoku Univ, and more.
Topical Areas: ? – Low voltage tunneling FETs ? – Energy efficient spintronic logic ? – Low voltage nanomechanical logic ? – Energy efficient memory and storage devices ? – Energy efficient chip scale interconnects ? – Low voltage CMOS circuits and architectures
$200, through Oct. 7th; register early: e3s-center.org/events/11/sym2011-home.htm

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