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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

October 24, 2011

Mtg: Key Considerations in Application of Current Transformers in Protective Relaying Systems

by @ 4:56 pm. Filed under ALL, Electrical/Power, Electronics Design
 

THURSDAY October 27, 2011
OEB Industry Applications Chapter
Speaker: Normann Fischer, Schweitzer Engineering Laboratories, Inc.
Time: No-host social at 5:30 PM; Presentation at 6:15 PM; Dinner at 7:15 PM; Presentation continues at 8:00 PM
Cost: $25 for IEEE members, $30 for non-members, $15 for student and retired members
Place: Zio Fraedos, 611 Gregory Lane, Pleasant Hill
RSVP: by October 24, by contacting Gregg Boltz, gboltz@brwncald.com or telephone (925) 210-2571
Web: www.e-grid.net/docs/1110-oeb-ias.pdf

Current transformers (CTs) are critically important components of medium voltage industrial protective relay systems.? CT performance during fault conditions determines the quality of transformed current signal (more…)

Mtg: Top Strategies for Cashing in on Asia’s Innovation Boom

by @ 4:55 pm. Filed under ALL, Electronics Design, Engineering Mgmt
 

THURSDAY October 27, 2011
SCV Components, Packaging and Manufacturing Technology Chapter
Speaker: Rebecca A. Fannin, author of Silicon Dragon and Startup Asia
Time: Registration at 11:30 AM; Buffet lunch at 11:45 AM; Presentation at 12:15 PM
Cost: $15 if reserved by Oct. 25; $5 for fulltime students and currently unemployed; $5 more at door
Place: Biltmore Hotel, 2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara
RSVP: from website
Web: www.cpmt.org/scv/meetings/cpmt1110l.html

Rebecca will explain strategies in the following areas:
– Geographies: -? ? China -? ? India -? ? Vietnam (more…)

Mtg: Soft Error Rate (SER) Workshop

by @ 4:53 pm. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt, NanoEngineering, Semiconductors
 

HURSDAY October 27, 2011
SCV Components, Packaging and Manufacturing Technology, with Electron Devices and Reliability Chapters
Speakers: (see website)
Time: Registration and light lunch at 11:30 AM; Presentations froom 12:00 PM – 5:00 PM
Cost: none. Can attend on-site (limit of 40 people) or on the live webcast
Place: Cisco Systems, Inc., 285 West Tasman Drive, San Jose
RSVP: from website
Web: www.cpmt.org/scv/meetings/cpmt1110w.html

Mtg: Emerging Body-Area Network Standard, IEEE 802.15.6

by @ 4:52 pm. Filed under ALL, Communications, Electronics Design
 

WEDNESDAY October 26, 2011
SCV Information Theory Chapter
Speaker: Arthur Astrin, PhD, Astrin Radio
Time: Refreshments at 5:30 PM; Presentation at 6:00 PM
Cost: none
Place: 202 Packard Bldg, Stanford University, Stanford
RSVP: not required
Web: ewh.ieee.org/r6/scv/it

Body Area Network (BAN) devices operate in close vicinity to, on, or inside body and can enable a wide range of applications, including medical support, healthcare monitoring and consumer electronics with increased (more…)

Mtg: Environmental Safety: An Update on Regulatory Requirements around the World

by @ 4:52 pm. Filed under ALL, Communications, Electronics Design, Engineering Mgmt
 

TUESDAY October 25, 2011
SCV Product Safety Engineering Chapter
Speaker: Gerardo Bertero, Ph.D, Western Digital Corp.
Time: Optional dinner at El Torito’s at 5:30 PM; Presentation at Applied Materials at 7:00 PM
Cost: none, for presentation
Place: Dinner at El Torito Mexican Restaurant, 2950 Lakeside Drive, Santa Clara; Presentation at Applied Materials, Bowers Café, 3090 Bowers Ave, Santa Clara
RSVP: not required
Web: ewh.ieee.org/r6/scv/pses

What started in Europe with RoHS and WEEE continues to expand and mutate across the world. Weâ??ll cover some of the changes in the â??recast??? of RoHS that just came in to force as well as REACH and its effect on (more…)

Mtg: Evolution of Perpendicular Magnetic Recording Media and Upcoming Challenges

by @ 4:50 pm. Filed under ALL, Computers/Software, NanoEngineering, Optics/Displays, Semiconductors
 

TUESDAY October 25, 2011
SCV Magnetics Chapter
Speaker: Gerardo Bertero, Ph.D, Western Digital Corp.
Time: Networking and cookies at 7:00 PM; Presentation at 7:30 PM
Cost: none
Place: Western Digital, 1710 Automation Parkway, San Jose
RSVP: not required
Web: ewh.ieee.org/r6/scv/mag

Since the 2005 commercial introduction of perpendicular magnetic recording in hard disk drives, the recording areal density has increased by a factor of 5 and it is likely to reach a factor of 10 on current technology extension before new (more…)

Mtg: Parallel Power Solutions

by @ 4:49 pm. Filed under ALL, Electrical/Power, Electronics Design
 

TUESDAY October 25, 2011
SF Industry Applications Chapter
Speaker: Curt Gibson, PE, Power Solutions
Time: Networking and pizza at 6:30 PM; Presentation at 7:00 PM
Cost: $30 (at the door). Email pre-registration.
Place: Sinbad’s Restaurant, Pier 2 The Embarcadero, San Francisco
RSVP: By email to Frank Sylvester, fsylvester@sfwater.org or telephone 415.554.1578
Web: www.e-grid.net/docs/1110-sf-ias.pdf

Parallel power solutions have always offered the standby generation marketplace significant advantages.? However, implementation of these solutions has been limited to mission critical applications and large kilowatt (more…)

Mtg: The Anatomy of Wearable Computing

by @ 4:48 pm. Filed under ALL, Communications, Computers/Software, Electronics Design
 

TUESDAY October 25, 2011
SCV Consumer Electronics Chapter
Speaker: Ted Ladd, Director of Developer Relations, WIMM Labs
Time: Networking and pizza at 6:30 PM; Presentation at 7:00 PM
Cost: $5 for IEEE Members, $10 for non-members (pay at door)
Place: NVIDIA, Building E, 2800 Scott Blvd., Santa Clara
RSVP: from website
Web: www.ieee.org/scvce

WIMM Labs is a Silicon Valley-based company that offers an innovative platform to enable a new class of personal devices that deliver information at a glance and a touch.? The WIMM Platform, the company’s platform for connected wearable (more…)

Mtg: The Impact of Microinverters in Photovoltaic Systems

by @ 10:11 am. Filed under ALL, Electrical/Power, Electronics Design, Engineering Mgmt, Semiconductors
 

WEDNESDAY November 16, 2011
SCV Power Electronics Chapter
Speaker: Dr. Brandon J. Pierquet Senior Design Engineer, Enphase Energy
Time: Networking, pizza at 6:00 PM; Presentation at 6:30 PM
Cost: none
Place: Texas Instruments (formerly National Semiconductor) Building E Auditorium, 2900 Semiconductor Drive, Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/pels

Interest in photovoltaic (PV) systems has increased significantly over the past decade, in both the public and private sector.? With the cost of photovoltaic modules dropping, and increasing energy costs, many installations are proving to (more…)

Webinar: Accelerating Development of Smart Grid Power Electronics Control Systems using RCP and HIL Techniques

by @ 8:35 am. Filed under ALL, Electronics Design, Engineering Mgmt
 

THURSDAY November 10, 2011
SPECTRUM Magazine
Speakers: Brian MacCleery,Principal Product Manager for Clean Energy Technology, National Instruments; William Kramer, National Renewable Energy Laboratory
Time: 11:00 AM PST (1 hour)
Cost: none
Place: on the Internet
RSVP: from web page
Web: spectrum.ieee.org/webinar

The design and deployment of grid-tied power electronics control systems historically has been hampered by a lack of rapid prototyping, commercial off-the-shelf embedded systems and real-time HIL simulators that satisfy the demanding (more…)

Tour: Sustainability Base at NASA Ames Research Center

by @ 8:18 am. Filed under ALL, Electrical/Power
 

WEDNESDAY November 9, 2011
SCV Power & Energy, and Industry Applications Chapter
Speaker: Rich Ross, Construction Manager, AECOM Design
Time: Tour at 6:00 PM
Cost: none; limited to first 20 people; US Drivers license/Greeen Card required
Place: Building N232, NASA Ames Research Center, Moffett Field
RSVP: by email, to Fred Jones, frederick.m.jones@nasa.gov, phone 650-604-2521
Web: www.e-grid.net/docs/1111-scv-pes.pdf

The tour will introduce you to the low energy, conservation and recycling design concepts of renowned Architect William McDonough.? This net-zero energy building utilizes LED lighting, optimized day-lighting controls, passive lighting enhancement with (more…)

Mtg: A 65nm Dual-Band 3-Stream 802.11n MIMO WLAN SoC (and 2nd talk)

by @ 6:51 am. Filed under ALL, Electronics Design, Semiconductors
 

MONDAY October 24, 2011
SCV Circuits and Systems Chapter
Subject: A 65nm Dual-Band 3-Stream 802.11n MIMO WLAN SoC; and A 10Gb/s Half-UI IIR-Tap Transmitter in 40nm CMOS
Speaker: Dr. Shahram Abdollahi-Alibeik, Qualcomm Atheros; and Halil Cirit, NetLogic Microsystems
Time: Networking and light dinner at 6:30 PM; Presentations at 7:00 PM
Cost: $2 donation accepted for food
Place: QualComm Santa Clara, Building B, 3165 Kifer Road, Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/cas

Mtg: Reliability and Yield of MOS Devices and Circuits

by @ 6:48 am. Filed under ALL, Electronics Design, NanoEngineering, Semiconductors
 

WEDNESDAY November 9, 2011
SCV Circuits and Systems Chapter
Speaker: Prof. Gilson Wirth, Universidade Federal do Rio Grande do Sul
Time: Networking and light dinner at 6:30 PM; Presentation at 7:00 PM
Cost: $2 accepted for food
Place: QualComm Santa Clara, Building B, 3165 Kifer Road, Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/cas

With the device sizes shrinking well below 100 nm and introduction of novel materials in the fabrication technology, new phenomena started playing a role on the reliability of MOS devices. As a consequence, performance and (more…)

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