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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

November 8, 2012

Mtg: Serial NOR FLash: Back to the Future

by @ 9:19 pm. Filed under ALL, Electronics Design, Semiconductors

TUESDAY December 4, 2012
SCV Consumer Electronics Chapter
Speakers: Manish Gulati, Sr. Marketing Manager, and Michael A. Wang, Sr. Field Application Manager, Macronix America Inc.
Time: Networking and pizza at 6:30 PM; Presentation at 7:00 PM
Cost: IEEE Members $5; Non-Members $10; Students free
Place: NVIDIA, Building E, 2800 Scott Blvd., Santa Clara
RSVP: from website

The electronics industry has witnessed a dramatic shift to serial interfaces in recent years. Parallel ATA is transformed into Serial ATA (SATA), traditional SCSI has given way to SAS (serial attached SCSI), PCI is (more…)

Mtg: Bugs and Stadia: Magnetic Reversal At Almost The Nanoscale

by @ 8:28 pm. Filed under ALL, NanoEngineering, Optics/Displays, Semiconductors

THURSDAY November 29, 2012
SCV Magnetics Chapter
Speaker: Prof. E. Dan Dahlberg, University of Minnesota
Time: Networking and pizza at 7:00 PM; Presentation at 7:30 PM
Cost: none
Place: Western Digital, 1710 Automation Parkway, San Jose
RSVP: not required

One of the current frontiers in magnetism is to understand the domain structure and the magnetization reversal in nanometer sized particles.? Explorations at these length scales have been aided by the (more…)

Webinar: Modeling Electromagnetic Phenomena in Vorpal with the VSimEM Package

by @ 1:12 pm. Filed under ALL, Communications, Electronics Design

THURSDAY November 15, 2012
Speaker: Travis Austin, Vice President of Computational Mathematics, Tech-X Corporation
Time: 11:00 AM (PST)
Cost: none
Place: on the Web
RSVP: from website

Vorpal is an electromagnetic and particle-in-cell software suite developed by Tech-X Corporation for simulating electromagnetic, particle, and plasma phenomena.? In this webinar, we will introduce the capabilities offered by the new (more…)

Mtg: Atomistic Aspects of the Resistive Switching Characteristics in RRAM Devices

by @ 12:23 pm. Filed under ALL, Electronics Design, NanoEngineering, Optics/Displays, Semiconductors

TUESDAY December 4, 2012
SCV Nanotechnology Chapter
Speaker: Dr. Blanka Magyari-Kope, Stanford University
Time: Registration & light lunch at 11:30 AM; Presentation at 12:00 PM noon
Cost: IEEE Members and Students $5; Non-Members $10
Place: Texas Instruments Bldg E-1 CMA Room, 2900 Semiconductor Drive, Santa Clara
RSVP: from website

Recently, numerous experimental and theoretical investigations have been undertaken in academia as well as various product-oriented efforts are going on in industry for resistives witching memory.? The rapid rise in publications for RRAM have mostly dealt (more…)

Short Course: RF Mixers – Analysis and Design Trade-offs

by @ 12:01 pm. Filed under ALL, Communications, Electronics Design, Semiconductors

SATURDAY November 10, 2012
SCV Circuits and Systems, with Solid State Circuits Chapter
Speaker: Homman Darabi, Sr. Technical Director and Fellow, Broadcom Corporation
Time: 10:00 AM – 12:45 PM
Cost: $40 for IEEE members, $50 for non-members, $20 for students/unemployed
Place: Texas Instruments auditorium, 2900 Semiconductor Dr., Santa Clara
RSVP: from website

Mixers are essential building blocks of every RF transceiver, often compromising the noise and linearity performance of the entire receive or transmit chain. In this short course various mixer architectures such as passive vs. active, current-mode vs. (more…)

Mtg: SunPower: Progress and Potential

by @ 10:56 am. Filed under ALL, Electrical/Power, Optics/Displays, Semiconductors

WEDNESDAY December 12, 2012
SCV Photovoltaics Chapter
Speaker: Doug Rose, vice president, Technology Strategy, SunPower
Time: Networking and refreshments at 6:30 PM; Presentation at 7:00 PM
Cost: none
Place: Palo Alto Research Center (G.E. Pake Auditorium), 3333 Coyote Hill Road, Palo Alto
RSVP: not required

Doug Rose joined SunPower in 2002 and currently holds the position of vice president, technology strategy.? Previous roles at SunPower include cell product engineering manager, director of module research and development, and (more…)

Mtg: New Class of Low-k Dielectrics for Advanced Interconnects

by @ 8:54 am. Filed under ALL, Electronics Design, NanoEngineering, Semiconductors

WEDNESDAY January 9, 2013
SCV Components, Packaging and Manufacturing Technology Chapter
Speaker: Yusuke Matsuda, Materials Science and Engineering, Stanford University
Time: Optional dinner at 6:00 PM; Presentation at 6:45 PM
Cost: $20 for dinner ($10 for students, unemployed); no cost for presentation
Place: Biltmore Hotel, 2151 Laurelwood Rd, Santa Clara
RSVP: from website

Low-k dielectrics in microelectronic interconnects play a crucial role in increasing device performance and lowering power consumption.? Silica-based low-k dielectrics are fragile, and have low device yield in packaging and limited (more…)

Mtg: Leading for Creativity

by @ 8:23 am. Filed under ALL, Engineering Mgmt

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