IEEE S.F. Bay Area Council e-GRID's

Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

December 18, 2013

Mtg: Beyond Monitoring: Getting the Most out of Solar PV Plants

by @ 8:15 am. Filed under ALL, Communications, Computers/Software, Electrical/Power, Optics/Displays

WEDNESDAY January 8, 2014
SCV Photovoltaics Chapter
– data, actionable insights, optimization
Speaker: Saurabh Samdani, PE, Cupertino Electric
Time: Networking and refreshments at 6:30 PM; Presentation at 7:00 PM
Cost: none
Place: Palo Alto Research Center (G.E. Pake Auditorium), 3333 Coyote Hill Road, Palo Alto
RSVP: not required

The true promise of PV monitoring isnâ??t tons of data, but the actionable insights gained from a thorough understanding of solar plant performance.  The process of installing a data acquisition system can be so complicated that (more…)


December 11, 2013

Mtg: Conductive-Bridge Memory (CBRAM): High-temperature Retention and Tolerance to Gamma Radiation

by @ 8:28 pm. Filed under ALL, Computers/Software, Electronics Design, NanoEngineering, Semiconductors

TUESDAY December 17, 2013
SCV Nanotechnology Chapter
Speaker: Dr. Venkatesh P. Gopinath, V.P. of CBRAM Technology, Adesto Technologies
Time: Networking and pizza at 11:30 AM; Presentation at 12:00 PM Noon
Cost: IEEE Members $5; Non-members $10
Place: TI Auditorium E-1, 2900 Semiconductor Drive, Santa Clara
RSVP: from website

Development activities in resistive memories have undergone explosive growth in the past several years.  Conductive-Bridge RAM (CBRAM) is a family of resistive memory that offers significant advantages of performance, cost, (more…)


Mtg: “Open” Networking: Three Talks

by @ 10:53 am. Filed under ALL, Communications

WEDNESDAY January 8, 2014
SCV Communications Chapter
– architectures, programmable equipment, software control, SDNs
Speakers: Guido Appenzeller, Big Switch; Kenneth Duda, Arista Networks; Mat Mathews, Plexxi Inc.
Time: Networking and refreshments at 6:30 PM; Presentations at 7:00 PM
Cost: none
Place: Texas Instruments Building E Conference Center, 2900 Semiconductor Dr. Santa Clara
RSVP: not required

“Open Networking” is a very popular industry initiative that aims to make networking equipment programmable and efficient while also lowering costs, especially OPEX.  In this new paradagm, network operators may chose the software to (more…)


December 9, 2013

Mtg: Searching for Profits at the Intersection of Nanotech and Electronics

by @ 11:35 am. Filed under ALL, BioEngineering, Electronics Design, Engineering Mgmt, NanoEngineering, Optics/Displays, Semiconductors

TUESDAY January 28, 2014
SCV Nanotechnology Chapter
Speaker: Ross Kozarsky, Senior Analyst, Lux Research Inc.
Time: Networking and pizza at 11:30 AM; Presentation at 12:00 PM Noon
Cost: IEEE Members $5; Non-members $10
Place: TI Auditorium E-1, 2900 Semiconductor Drive, Santa Clara
RSVP: from website

Despite massive media attention and investments, nanotechnology has yet to live up to the hype, and many are still confused as to the best context for examining â??nanoâ? for the purpose of business-minded analyses.  Rather than regarding nano as its own (more…)


Mtg: The Impact of Cables and Connectors on Radio Frequency and Microwave Measurement Uncertainties

by @ 11:20 am. Filed under ALL, Communications, Electronics Design, Engineering Mgmt

TUESDAY January 14, 2013
SCV Electromagnetic Compatibility Chapter
Speaker: Dennis Lewis, Boeing
Time: Networking and light dinner (small fee) at 5:30 PM; Presentation at 6:30 PM
Cost: none, for talk
Place: Agilent Technologies, Bldg. 5L, 5301 Stevens Creek Blvd, Santa Clara
RSVP: not required

Microwave test and measurement equipment is used for many applications, including component measurements, electromagnetic compatibility testing, metrology and wireless environment assessments.  Much of this equipment requires special (more…)


Mtg: A Tale of Three Actuators: How Mechanics, Business Models and Position Sensing Affect Different Mechatronic Servo Problems

by @ 10:56 am. Filed under Electronics Design, Semiconductors

TUESDAY December 10, 2013
SCV Computational Intelligence Chapter
Speaker: Daniel Abramovitch, Agilent Technologies
Time: Presentation at 7:00 PM
Cost: none
Place: Carnegie Mellon Silicon Valley, Building 23 Room 118, 158 Cody Road, Moffett Field
RSVP: from website

Students studying control problems often learn a lot ofwondrous algorithms that impart near mythical properties to the systems that they are applied to.  At least this is how it works in theory and simulation.  In practice, however, a thorough understanding of (more…)


December 3, 2013

Mtg: High-Performance Datacenter Platform: Using InP for Silicon Photonics

by @ 8:39 pm. Filed under ALL, Computers/Software, Electrical/Power, Electronics Design, Optics/Displays, Semiconductors

WEDNESDAY January 8, 2014
SCV Components, Packaging and Manufacturing Technology Chapter, with Photonics
Speaker: Dr. Michael Lebby, President and CEO, OneChip Photonics; Professor of Optoelectronics, Glyndwr University, Wales, UK
Time: Optional dinner at 6:00 PM; Presentation at 6:45 PM
Cost: $20; $10 for full-time students and unemployed ($5 more at door)
Place: Biltmore Hotel, 2151 Laurelwood Rd, Santa Clara
RSVP: from website

Is a high-performance datacenter platform using InP a silicon photonics play?  This issue will be addressed. Designing and packaging InP-based PICs (Photonic Integrated Circuits) & OEICs (Optoelectronic Integrated Circuits) will be (more…)


Besser Associates Fall/Winter RF Classes

by @ 4:07 pm. Filed under ALL, Communications, Electronics Design

The worldwide leader in RF and Wireless Training
Besser Associates Fall/Winter Classes
Headquartered in Mountain View since 1985, we have delivered theory with hands-on practical training to professionals working with analog, RF, wireless, digital, and networking technologies — to over 45,000 people. Get more information on these upcoming local courses:
Hardware DSP: A guide to building DSP Circuits in FPGAs (Nov 18-20)   –LTE & LTE-Advanced: A Comprehensive Overview (Nov 18-20)   –Phase-Locked Loop and Frequency Synthesis Design (Nov 21-22)   –Intro to Wireless Communication Systems (Dec 9-10) … and more.
For these and other classes, or customized/private courses at your facility, download our Schedule/Flyer ( – PDF) or visit the website:


Mtg: Development of Graphene-based RF Integrated Circuits

by @ 2:00 pm. Filed under ALL, Electronics Design, NanoEngineering, Semiconductors

THURSDAY December 12, 2013
SCV Solid State Circuits Chapter, with Circuits and Systems
Speaker: Alberto Valdes-Garcia, RF Circuits and Systems Group, IBM T. J. Watson Research Center
Time: Networking and snacks at 6:30 PM; Presentation at 7:00 PM
Cost: none
Place: QualComm, 3165 Kifer Road, Santa Clara
RSVP: from website

Graphene is a two-dimensional (2D) material, consisting of a sheet of carbon atoms arranged in a honeycomb lattice, and possesses exciting potential for high frequency electronics due to its high intrinsic carrier mobility (> 10,000 cm2/Vs at (more…)


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