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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

December 3, 2013

Mtg: High-Performance Datacenter Platform: Using InP for Silicon Photonics

by @ 8:39 pm. Filed under ALL, Computers/Software, Electrical/Power, Electronics Design, Optics/Displays, Semiconductors
 

WEDNESDAY January 8, 2014
SCV Components, Packaging and Manufacturing Technology Chapter, with Photonics
Speaker: Dr. Michael Lebby, President and CEO, OneChip Photonics; Professor of Optoelectronics, Glyndwr University, Wales, UK
Time: Optional dinner at 6:00 PM; Presentation at 6:45 PM
Cost: $20; $10 for full-time students and unemployed ($5 more at door)
Place: Biltmore Hotel, 2151 Laurelwood Rd, Santa Clara
RSVP: from website
Web: www.cpmt.org/scv/meetings/cpmt1401.html

Is a high-performance datacenter platform using InP a silicon photonics play?  This issue will be addressed. Designing and packaging InP-based PICs (Photonic Integrated Circuits) & OEICs (Optoelectronic Integrated Circuits) will be (more…)

20140108scv

Besser Associates Fall/Winter RF Classes

by @ 4:07 pm. Filed under ALL, Communications, Electronics Design
 

The worldwide leader in RF and Wireless Training
Besser Associates Fall/Winter Classes
Headquartered in Mountain View since 1985, we have delivered theory with hands-on practical training to professionals working with analog, RF, wireless, digital, and networking technologies — to over 45,000 people. Get more information on these upcoming local courses:
Hardware DSP: A guide to building DSP Circuits in FPGAs (Nov 18-20)   –LTE & LTE-Advanced: A Comprehensive Overview (Nov 18-20)   –Phase-Locked Loop and Frequency Synthesis Design (Nov 21-22)   –Intro to Wireless Communication Systems (Dec 9-10) … and more.
For these and other classes, or customized/private courses at your facility, download our Schedule/Flyer (www.besserassociates.com/Schedule.pdf – PDF) or visit the website: www.besserassociates.com

20131101all

Mtg: Development of Graphene-based RF Integrated Circuits

by @ 2:00 pm. Filed under ALL, Electronics Design, NanoEngineering, Semiconductors
 

THURSDAY December 12, 2013
SCV Solid State Circuits Chapter, with Circuits and Systems
Speaker: Alberto Valdes-Garcia, RF Circuits and Systems Group, IBM T. J. Watson Research Center
Time: Networking and snacks at 6:30 PM; Presentation at 7:00 PM
Cost: none
Place: QualComm, 3165 Kifer Road, Santa Clara
RSVP: from website
Web: sites.ieee.org/scv-sscs

Graphene is a two-dimensional (2D) material, consisting of a sheet of carbon atoms arranged in a honeycomb lattice, and possesses exciting potential for high frequency electronics due to its high intrinsic carrier mobility (> 10,000 cm2/Vs at (more…)

20131212scv

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