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April 19, 2017

Energy Efficient Memory Design for the Compute Continuum and Beyond 

by @ 2:09 pm. Filed under ALL, Circuits, Semiconductors
 

Monday, May 22, 2017 
SCV Circuits and Systems (CAS) Chapter 
Subject: Energy Efficient Memory Design for the Compute Continuum and Beyond 
– circuit solutions for realizing energy efficient memory arrays, Supply voltage scaling is the primary driver to reduce energy consumption… 
Speaker: Dr. Jaydeep Kulkarni, Staff Research Scientist at Intel Corporation 
Time: 6:30pm: Networking/Light Dinner; 7:00 pm: Announcement; 7:05pm: Presentation; 8:15pm: Adjourn
Cost: Free; Food donation accepted: $2 for IEEE member, $5 for non-IEEE member 
Location: Qualcomm Santa Clara, Building B, 3165 Kifer Road, Santa Clara 
Event Details: http://sites.ieee.org/scv-cas 
Registration Link: https://www.eventbrite.com/e/energy-efficient-memory-design-for-the-compute-continuum-and-beyond-tickets-33716796847 

20170522ALL

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