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October 23, 2009

SCV-CPMT: Impact of Packaging Materials and Processes on Device Soft Error Rates

by @ 10:58 am. Filed under ALL, Communications, Computers/Software, Electronics Design, Semiconductors
 

FRIDAY October 30, 2009
SCV Components, Packaging and Manufacturing Technology, with Electron Devices and Reliability, and ASQ Rel Division
Subject: Impact of Packaging Materials and Processes on Device Soft Error Rates
Speakers: from Cisco Systems, Honeywell, XIA, ASE, Sun Microsystems, and Medtronic
Time: Registration at 8:45 AM; Presentations and Panel from 9:00 AM – 12:00 Noon
Cost: none
Place: Live on the Internet through WebEx; also in-person at Cisco Building O, 10 West Tasman Drive (at corner of N. First St), San Jose
RSVP: Required, by October 28, on our DoubleKnot site; on-site seating is limited
Web: www.cpmt.org/scv

Half-day Seminar with six talks:
“Impact of Substrate SOP on Flip Chip Soft Error Rates,” Rick Wong, Cisco Systems
“Progress Towards Standardization of Alpha Flux Measurements on Electronic Materials,” Brett Clark, Honeywell
“Improving Accuracy of Alpha Emissivity Measurements for Wafers and Packaging Materials,” Brendan Dwyer-McNally, XIA LLC
“Dedicated ULA Assembly Line for Alpha Emissivity Control,” Andy Tseng, ASE
“Alpha Particle or Neutron SER – What Will Dominate in Future IC Technology?”
Charles Slayman, Sun Microsystems
“Soft Error Considerations for Low Power, High Reliability Applications,” Jeff Wilkinson, Medtronic

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