IEEE S.F. Bay Area Council e-GRID's
BayAreaTech

TUESDAY December 15, 2009
SCV Nanotechnology, with CPMT, EMC and EDS Chpaters
Speaker: Dr. Ritu Shrivastava, VP Manufacturing Technology, ZettaCore Inc.
Time: Light lunch at 11:30AM; Presentation 12:00 noon
Cost: IEEE Members and Students $5; Non-Members $10
Place: National Semiconductor Bldg E-1 CMA Room. 2900 Semiconductor Drive, Santa Clara
RSVP: from the website
Web: www.ieee.org/nano

This talk will discuss the use of charge storage molecules at the nanoscale with molecular attachments to metals, to form a capacitor which is unlike any conventional capacitor.? This nanoscale device uses a different physical mechanism which involves utilizing charge storage in self assembled monolayers (or polymers).? The capacitor can be integrated using silicon IC wafer technology to achieve an ultrathin capacitor, but there are other potential implementations also possible for non-semiconductor based applications, such as embedded capacitor formation for PCB multi-layer IC substrates.? The uniqueness of this approach is to achieve capacitance/area values in a thin profile which are unachievable using conventional dielectrics in the frequency range of application.? This is a new type of device which exhibits a unique frequency dependent capacitance.? Advantages and uniqueness of the device will be discussed for potential user community.