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January 27, 2010

Mtg: High Frequency Characterization of Transistors

by @ 3:28 pm. Filed under ALL, Communications, Electronics Design, Semiconductors
 

TUESDAY February 16, 2010
SCV Electron Devices Chapter
Speaker: J. Prasad, SuVolta Inc.
Time: Networking and pizza at 6:00 PM; Presentation at 6:15 PM
Cost: none
Place: National Semiconductor, Building E1, Conference Center, 2900 Semiconductor Drive, Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/eds

Most of the device and process engineers spend a lot of time looking at the D.C parametric data to make sure the device will be functional.? They rarely find time to study the A.C parameters.? At best, they look at the 1MHz capacitance data from large structures to get an estimate of the device capacitance.? Ring oscillator data collected from a frequency counter attached to the D.C parametric tester gives a glimpse of the gate delay.? Afterwards, the wafers are thrown on the â??other side of the wall??? where the microwave engineers do the high-frequency characterization of the device.? Quite often, the buzz words, lingo and the vocabulary of the microwave engineers completely throws back the device engineers.? This talk will describe what is happening â??behind the scenes??? in the high-frequency lab.? This talk will briefly introduce you to S-parameters, the vector network analyzer, calibration and de-embedding using test structures.? The device Figures of Merit Ft and Fmax will be described. We will show how to extract Ft and Fmax from the measured S-parameters.? The influence of Masonâ??s gain, Maximum Available Gain (MAG) and Maximum Stable Gain (MSG) on Fmax will be shown.? The measured S-parameters will also help us in developing a high-frequency model for the device.

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