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April 23, 2010

Mtg: Power-Efficient Data Converters

by @ 4:20 pm. Filed under ALL, Communications, Electronics Design, Engineering Mgmt, Semiconductors
 

THURSDAY April 29, 2010
SCV Solid State Circuits Chapter
Speaker: Prof. Franco Maloberti (Distinguished Lecturer of the Solid State Circuit Society and Fellow of IEEE)
Time: Networking and pizza at 6:00 PM, Presentation at 6:30 PM
Cost: Small donation to cover food
Place: National Semiconductor Building E Auditorium, 2900 Semiconductor Dr., Santa Clara
RSVP: Not required
Web: www.ieee.org/scv/ssc

Portable and nomadic systems require developing power effective and power aware design methodologies for either analog or digital circuits.? For data converters, low power and optimal resolution imply a favorable allocation of the noise budget.? The noise comes from different sources: quantisation, sampling, clock jitter, spur interference and board interference.? The distribution of the available noise power, that becomes lower and lower as the supply diminishes, depends on the specification of the system and it may require one or more extra-bits in the data converter.? The noise budget issue is new; it was rarely faced in the past when power was just a concern for limiting the chip temperature.? The growing relevance of power efficiency is demonstrated by the great attention on the figure of merit (FoM) of data converters that, in the past few years, has been reduced by almost two orders of magnitude.? The presentation will show that obtaining power? effectiveness is a matter of trade-offs between architecture, design methodologies, and implementation of circuits.? Advances in technology challenge data converter design.? In addition to a reduced supply voltage, the worsening of transconductance and output resistance degrades the intrinsic gain and makes it difficult to design high-gain op-amps.? Noise, both thermal and 1/f, also increases.? Moreover, accuracy and linearity of passive and active components is problematic at minimum features.? All those limits must be understood and accounted for to ensure effective data converters design.? After discussing the above general issues this presentation will describe the design of significant achievements and illustrate their experimental verifications.? The given design examples, pertaining data converters operating in different regions of conversion speed and resolution, are a band-pass sigma-delta, a power effective sigma-delta for DVB-H, some? digital-assisted sigma-delta schemes and an ultra low-power SAR.

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