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June 7, 2010

Mtg: 48-Core Cloud Computer Chip

by @ 7:19 am. Filed under ALL, Computers/Software, Electronics Design, Engineering Mgmt, Semiconductors
 

TUESDAY June 8, 2010
SCV Computer, with Solid State Circuits Chapters?
Speaker: Jason Howard, Senior Technical Researcher, Intel
Time: Networking with food and beverage at 6:30 PM; Presentation at 7:00 PM
Cost: $2 donation helps cover food
Place: National Semiconductor, Building E Conference Center, 2900 Semiconductor Drive, Santa Clara
RSVP: Via EventBrite link: 48corechip.eventbrite.com
Web: ewh.ieee.org/r6/scv/computer

In this talk, Jason Howard describes a processor integrating 48 IA-32 cores, 4 DDR3 memory channels, and a voltage regulator controller in a 6Ã?4 2D-mesh network-on-chip architecture.? Located at each mesh node is a five-port virtual cut-through packet switched router shared between two cores.? Core-to-core communication uses message passing while exploiting 384KB of on-die shared memory.? Fine grain power management takes advantage of 8 voltage and 28 frequency islands to allow independent DVFS of cores and mesh.? At the nominal 1.1V, cores operate at 1GHz while the 2D-mesh operates at 2GHz.? As performance and voltage scales, the processor dissipates between 25W and 125W.? The 567mm2 processor is implemented in 45nm Hi-K CMOS and has 1,300,000,000 transistors.

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