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February 26, 2011

Mtg: Mixed-Signal Design Verification: An RF-SOC Approach

by @ 4:59 pm. Filed under ALL, Communications, Electronics Design, Engineering Mgmt, Semiconductors
 

MONDAY February 28, 2011
SCV Circuits and Systems Chapter
Speakers: Jesse Chen and Jonathan David, Qualcomm
Time: Networking/Light Dinner at 6:30 PM; Presentation at 7:00 PM
Cost: $2 donation accepted for food
Place: QualComm Santa Clara, Building B, 3165 Kifer Road, Santa Clara
RSVP: not required
Web: ewh.ieee.org/r6/scv/cas

With 80% of Industry SOC projects containing 20%+ Mixed-Signal content, and 70% of Industry SOC re-spin issues being AMS (analog/mixed-signal) in nature (see ref, below), design verification for SOCâ??s must include a mixed-signal component, especially if the mixed-signal content includes a Radio.? The Qualcomm RF/Analog Verification team will present 2 recently published papers in this arena, 1 describing the modeling methodology used at Qualcomm, the other presenting an example of the methodology as applied to the Mixer circuit in a typical receiver path.? Use of this methodology eliminates most of the AMS functional issues, so that most remaining re-spins are for AMS/RF parametric issues only, allowing a production ramp on the second spin, rather than the third or fourth.

Ref: http://eda360insider.wordpress.com/2010/11/05/70-of-re-spin-issues-are-ams-in-nature-how-mixed-signal-design-can-mess-up-a-perfectly-good-soc/

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