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March 24, 2011

Mtg: Building Brains with Memristive Memory

by @ 11:58 am. Filed under ALL, Computers/Software, NanoEngineering
 

TUESDAY April 19, 2011
SCV Nanotechnology Chapter
Speaker: Greg Snider, HP Labs
Time: Registration & light lunch 11:30 AM; Presentation at 12:00 PM Noon
Cost: IEEE Members and Students $5; Non-Members $10
Place: National Semiconductor Bldg E-1 CMA Room, 2900 Semiconductor Drive, Santa Clara
RSVP: from the website
Web: www.ieee.org/nano

What are the technological, economic, and conceptual barriers to building intelligent machines that adaptively interact with a changing and uncertain world? This talk will cover some key mathematical foundations (nonlinear dynamics, tensor analysis, bias/variance dilemma), hardware issues (analog vs digital, power, cost, memory), neural algorithms (algebra vs. analysis, domain transformations) and architecture.

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