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April 26, 2011

Mtg: Simulation of Nano-Scale Statistical Variability and Reliability: From TCAD to Statistical Circuit Simulation

by @ 1:31 pm. Filed under ALL, Electronics Design, Engineering Mgmt, NanoEngineering, Semiconductors
 

TUESDAY June 14, 2011
SCV Electron Devices Chapter
Speaker: Prof. Asen Asenov, FIEEE, FRSE; Leader of the Device Modeling Group, University of Glasgow; CEO of Gold Standard Simulations Ltd.
Time: Pizza and networking at 6:00 PM; Presentation at 6:15 PM
Cost: none
Place: National Semiconductor, Building E1 Conference Center, 2900 Semiconductor Drive, Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/eds

Simulation of statistical variability and reliability is of great importance for the semiconductor industry. In the technology development cycle it can help the design of transistors with reduced variability by tailoring the device structure and doping distribution.? It can facilitate the screening of new device architectures in terms of their variability reduction potential.? TCAD of statistical variability and reliability in the early technology development cycle can help to develop accurate and realistic compact models at the PDK stage improving the quality of the design process.? Finally the forecast of the statistical variability few technology generations ahead is of great importance for the development of new variability resistant design strategies and corresponding EDA tools.? In this talk Professor Asenov will present advanced TCAD simulation methods and tools that allow the predictive simulation of statistical variability and statistical reliability in present and future nanoscale CMOS transistors.? The capabilities of the tools will be illustrated with simulation results of statistical variability in conventional and novel MOSFET architectures scaled according to the prescriptions of the ITRS.? Professor Asenov will present also advanced strategies and tools for statistical compact model extraction and generation and statistical circuit simulation.

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