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July 10, 2011

Mtg: Architectures and Signal Integrity Challenges for 100 Gbps Data Transmission Systems

by @ 3:51 pm. Filed under Communications, Computers/Software, Electronics Design, Optics/Displays
 

WEDNESDAY July 13, 2011
SCV Communications Chapter
Speaker: Lux Joshi, Product Specialist,LeCroy Corporation
Time: Food and networking at 6:00 PM; Presentation at 6:30 PM
Cost: $5 donation is requested for refreshments
Place: National Semiconductor Auditorium (Bldg E), 2900 Semiconductor Drive, Santa Clara
RSVP: from website
Web: www.ewh.ieee.org/r6/scv/comsoc

100 Gbps networks are being developed to address the need for substantially higher bandwidth in core networking applications.? However, there are technical hurdles in implementing end-to-end 100Gbps transmission systems which require advances in all elements of the ecosystem – from more sophisticated SERDES to higher order modulation formats.
This talk will give an overview of architectures for 100Gbps systems (in both deployed and proposed systems).? In addition standards work around these systems will be presented, including IEEE 802.3 variants as well as OIF CEI-28G standards.? Channel models and transmit/receive topologies will be described.? Jitter measurement and SI validation techniques for 25+Gb lanes will be addressed.? Finally, system performance will be discussed.

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