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December 5, 2011

Mtg: Fine-Grained 3D Integration

by @ 4:19 pm. Filed under ALL, Communications, Computers/Software, Electronics Design, Engineering Mgmt, Semiconductors
 

WEDNESDAY January 11, 2011
SCV Components, Packaging and Manufacturing Technology Chapter
Speaker: Deepak Sekar, MonolithIC 3D Inc.
Time: Optional buffet dinner at 6:00 PM; Presentation (no charge) at 6:45 PM
Cost: $20 per person; $10 for fulltime students and currently unemployed engineers; $5 more at the door
Place: Biltmore Hotel, 2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara
RSVP: from website
Web: www.cpmt.org/scv/meetings/cpmt1201.html

Approaches to obtain small size through-silicon connections will be described.? This will include evolutionary approaches to extend todayĆ¢??s TSV technology as well as fundamentally different monolithic 3D techniques.? The first products using 3D packaging and TSV on the market are expected to have TSV diameters in the 5um range, while the International Technology Roadmap for Semiconductors calls for TSV diameters in the 1um range.? While these TSV sizes are suitable for DRAM stacking atop logic, wide I/O DRAM and other applications, we will show in this talk that getting through-silicon connections in the 10s of nm to 100s of nm range could have tremendous benefits.

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