IEEE S.F. Bay Area Council e-GRID's
BayAreaTech

Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

December 30, 2011

Mtg: Combining Accurate Measurement with Thermal Simulation

by @ 4:08 pm. Filed under Electronics Design, Engineering Mgmt, Semiconductors
 

THURSDAY January 26, 2012
SCV Components, Packaging and Manufacturing Technology Chapter
Speaker: John Wilson, Mentor Graphics Corporation
Time: Buffet lunch at 11:30 AM; Presentation at 12:15 PM
Cost: $15 per person; $5 for fulltime students and currently unemployed engineers; $5 more at the door
Place: Biltmore Hotel, 2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara
RSVP: from website
Web: www.cpmt.org/scv/meetings/cpmt1201l.html

The evolution of handheld consumer products, high powered ASICs, and LEDs have created increasing thermal management challenges. The analytical software and hardware test tools used to design these products also evolved to allow quicker and more accurate thermal performance assessments; however, the synergy between the software and hardware test methods has essentially remained unchanged until recently. Last year, a new JEDEC test procedure, the JESD51-14 Transient Dual Interface Test Method, was approved which greatly enhances this relationship.
With the approval of the JESD51-14 standard, two important issues are addressed. First, the standard defines the method for determining a deviceâ??s most important thermal metric, junction-to-case thermal resistance (RJC). Second, the new procedure is for performing a transient test, thus it captures the dynamic thermal response of the IC device along its dominant heat transfer path. With todayâ??s compact thermal modeling technology, the measurement results from the tester can be transferred directly into the analysis software. No longer will there be time wasted determining how to leverage the results of a test or developing a detailed thermal model.
This discussion will focus on the difficulties in measuring RJC before the JESD51-14 standard and how this standard has led to the ability to effortlessly develop accurate dynamic compact thermal models to be used in analysis and thermal design.

Comments are closed.

[IEEE S.F. Bay Area Council - www.e-grid.net] [powered by WordPress .]

SF Bay Area Council

Categories

  • ALL (4,595)
  • Antennas & Propagation (4)
  • BioEngineering (665)
  • Blogroll (33)
  • Circuits (11)
  • Communications (1,856)
  • Computers/Software (1,750)
  • Consumer Electronics (97)
  • Control Systems (19)
  • Electrical/Power (1,270)
  • Electronics Design (2,771)
  • Employment (4)
  • Employment opportunities (6)
  • Engineering Mgmt (1,807)
  • Green energy (42)
  • History (4)
  • Industrial Applications (80)
  • Information Theory (11)
  • Instrument and Measurement (1)
  • Magnetics (24)
  • Microwave (8)
  • NanoEngineering (870)
  • Optics/Displays (968)
  • Photonics (25)
  • PhotoVoltaics (4)
  • Product Safety (23)
  • Reliability (34)
  • Robotics and Automation (15)
  • Semiconductors (1,836)
  • Signal Processing (132)
  • Vehicular Technology (10)
  • Women in Engineering (7)
  • Young Professionals (2)
  •  

    Support our advertisers:

    Visit our
    GRID MARKETPLACE

    Enabling Javascript allows us to show you upcoming conferences in this column.

    For the Firefox browser, select Tools/Options/Content and select "Enable Javascript".

    If you are using Microsoft Internet Explorer you may need to click on the yellow bar above and select 'Allow Blocked Content'. You must then click 'Yes' on the following security warning.

    archives:

    December 2017
    S M T W T F S
    « Nov    
     12
    3456789
    10111213141516
    17181920212223
    24252627282930
    31  

    View in Google Calendar

    search blog:


    SUBSCRIBE: Get the e-GRID twice a month by email - upcoming IEEE SF Bay Area meetings, conferences.

    RSS Feed Subscribe to our RSS Feed.

    PUBLICIZE your event to IEEE's membership.


    general links:

    22 queries. 0.715 seconds