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January 6, 2012

Mtg: All-Digital Transmitter

by @ 9:52 am. Filed under ALL, Communications, Electronics Design, Semiconductors

MONDAY January 16, 2012
SCV Circuits and Systems Chapter
Speaker: Kostas Galanopoulos, National Technical University of Athens
Time: Networking/Light Dinner at 6:30 PM; Presentation at 7:00 PM
Cost: $2 donation accepted for food
Place: QualComm Santa Clara, Building B, 3165 Kifer Road, Santa Clara
RSVP: not required

Wireless transceivers are some of the few remaining analog-intensive super-blocks in modern Systems-On-Chips. Designing their RF/analog blocks, in contrast to digital blocks, requires significant effort and time due to limited automation and porting capability in the design process. In addition, RF sub-blocks may require advanced fabrication technologies which are much more expensive than standard CMOS ones. Over the past decades, major effort has been dedicated in replacing many analog blocks by digital ones, e.g. frequency synthesizers and base-band signal processors.
The proposed architecture of a purely digital transmitter can be implemented in digital FPGA or ASICs. It is very versatile and can be easily modified to accommodate most of the commonly used modulation schemes (PM, AM, QAM, BPSK, FSK, QPSK etc.) as well as to operate in any desirable frequency band supported by the FPGA or ASIC technology used. It provides an alternative to popular analog-RF architectures offering extremely fast concept-to-market time, low cost, minimal chip-area and power requirements while achieving performance, adequate for many wireless applications.
A live demo of the รข??All – Digital Transmitter???, with all of its components (Frequency Synthesizer, Modulator, ADC for analog Audio acquisition) implemented within a mini FPGA board (XuLA-50 / Xilinx Spartan 3A), will be presented.
This work has been supervised by Prof. Paul Sotiriadis of the National Technical University of Athens, Greece, (formerly with the Johns Hopkins University) and extends the concepts of all-digital frequency synthesis presented by Drs. Sotiriadis, Staszewski and Xiu, in the S.C. IEEE chapter on August 14-15, 2010.

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