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March 13, 2013

Mtg: Signal Integrity in High-Speed Data Links

by @ 7:37 pm. Filed under ALL, Communications, Electronics Design, Optics/Displays, Semiconductors
 

Solid State Circuits Chapter Tutorial
Signal Integrity in High-Speed Data Links 
— May 16, 5:30 PM     — Texas Instruments, Santa Clara
— $30 for IEEE members     — $40 for non-members
Two Lectures.   Topics:   – Introduction to high-speed links   – Introduction to signal integrity   – Signal and Timing parameters   – Transmission lines: cross-talk, loss and modeling   – Channel loss and compensation (equalization)   – Continuous Time Linear Equalizer (CTLE)   – Decision Feedback Equalizer (DFE)   – Pre-emphasis   – Use case: challenges in PCIe 4.0 data link.
Information, and to register: si2013.eventbrite.com

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