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November 10, 2013

Mtg: Drinking from the Firehose: Run-ahead Transfer Prediction in the Mill CPU Architecture

by @ 3:11 pm. Filed under ALL, Computers/Software
 

TUESDAY November 12, 2013
SCV Computer Chapter
Speaker: Ivan Godard, CTO, Out-of-the-Box Computing
Time: Networking and refreshments at 6:30 PM; resentation at 7:00 PM
Cost: none
Place: Cadence / Bldg 10, 2655 Seely Ave, San Jose
RSVP: from website
Web: sites.ieee.org/scv-cs
Programs frequently execute only a handful of operations between transfers of control: branches, calls, and returns. Yet modern wide-issue VLIW and superscalar CPUs can issue similar handfuls of operations every cycle, so the hardware must be able to change to a new point of execution each cycle if performance is not to suffer from stalls. To change the point of execution requires determining the new execution address, fetching instructions at that address from the memory hierarchy, decoding the instructions, and issuing them, steps that can take tens to hundreds of cycles on modern out-of-order machines. Without special provision, a machine could take 20 cycles to transfer in order to do one cycle of actual work.
The special provision in conventional out-of-order processors is the branch predictor, which attempts to predict the taken vs. untaken state of conditional branches based on historical behavior of the same branch in earlier executions. Modern predictors achieve 95% accuracy, and large instruction windows can hide top-level cache latency, which together are sufficient for programs like benchmarks that are regular and small. On real-world problems such CPUs can spend a third or more of cycles stalled for code.
The Mill uses a novel prediction mechanism to avoid these problems; it predicts transfers rather than only branches. It can do so for all code, including cold code that has never been executed, running well ahead of execution so as to mask all cache and most memory latency. It needs no area- and power-hungry instruction window, using instead a very short decode pipeline and direct in-order issue and execution. It can use all present and future prediction algorithms, with the same accuracy as any other processor. On those occasions in which prediction is in error, the mispredict penalty is four cycles, a quarter that of superscalar designs. As a result, code stall is a rarity on a Mill, even on large programs with irregular control flow.
The talk describes the prediction mechanism of the Mill and compares it with the conventional approach.

20131112scv

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