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April 30, 2008

Mtg: Semiconductor Manufacturing and Test Trends

by @ 7:40 am. Filed under ALL, Electronics Design, Engineering Mgmt, NanoEngineering, Semiconductors
 

THURSDAY May 22
SCV Components, Packaging and Manufacturing Technology Chapter
Speaker: Prof. Dr. Ir. Erik H. Volkerink, Verigy Ltd.
Time: Registration at 11:30 AM, Buffet Lunch at 11:45 AM, Presentation at 12:15 PM
Cost: $15 for lunch
Place: Ramada Inn, 1217 Wildwood Ave (Fwy 101 frontage road, near Lawrence Expy), Sunnyvale
RSVP: by email to Ed Aoki, aoki.ed@gmail.com
Web: www.cpmt.org/scv

Dr. Volkerink reviews the semiconductor Cycle of Innovation and what it means to semiconductor test. HeĆ¢??ll touch on advances in silicon technologies, reliability, the critical nature of ramping to yield, and the trends for integration. From there, he will delve deeper into the semiconductor test Cycle of Innovation, discussing innovations in test methods to address quality, throughput, and capital expenditures. Economics is a pervasive thread to the discussion.

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