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September 22, 2008

All-day Mini-Colloquium: New Frontiers of Compact Modeling

by @ 1:01 pm. Filed under ALL, Electronics Design, Engineering Mgmt, Semiconductors
 

FRIDAY October 10, 2008
SCV Electron Devices Chapter
Speakers: from Silterra USA, University of Central Florida, McMaster University, Hiroshima University, UC-SD, UT-Austin plus student poster papers
Time: 9:00 AM – 5:00 PM
Cost: none (includes lunch)
Place: Santa Clara University, Santa Clara
RSVP: Pre-registration should be sent to Amber Dela Cruz, adelacruz@scu.edu by Tuesday, October 7th – please include your name and affiliation
Web: www.ewh.ieee.org/r6/scv/eds

The IEEE Electron Devices Society (EDS) Compact Modeling Technical Committee in collaboration with IEEE Santa Clara Valley (SCV) EDS chapter and IEEE Santa Clara University Student chapter has organized a mini-colloquium on October 10, 2008. The main focus area of the colloquium is â??New frontiers of compact modeling.???

9:00 AM: Registration

9:20 AM: Introduction: Dr. S.K. Saha, Silterra USA Inc.,

9:20 AM: Welcome Address, Prof. C. Yang, Chair, Electrical Engineering Department, Santa Clara University,

9:30 AM â?? 12:00 Noon: Session I Chair: Prof. T. Yamada, Santa Clara University

9:30 AM: Compact modeling of silicon controlled rectifier for electrostatic discharge (ESD) computeraided design applications, Prof. J.J. Liou, University of Central Florida, Orlando, Florida.

10:20 AM: Noise issues in advanced silicon devices and circuits, Prof. M.J. Deen, McMaster Univ.

11:10 AM: Modeling and characterization of RF/analog and noise using HiSIM2, Prof. N. Sadachika, Hiroshima University

12:00 PM â?? 2:00 PM: Lunch Break & Student Poster Session

2:00 PM â?? 5:00 PM: Session II; Chair: Dr. J. Prasad, DSM Solutions Inc

2:00 PM: Compact modeling of multiple-gate MOSFETs, Prof. Y. Taur, J. Song, and B. Yu (speaker), University of California â?? San Diego

2:50 PM: Nanoscale MOSFET physics: Observations from non-compact modeling studies, Prof. L.F. Register, University of Texas, Austin

3:40 PM: Wafer bonding for heterogeneous integration, Prof. P.K. Yu, University of California â?? San Diego

4:30 PM: Closing Remarks: Dr. S.K. Saha, IEEE EDS Compact Modeling Technical Committee

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