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September 25, 2008

Mtg: Studying Embedded Capacitance in a Practical High-speed PCB Design

by @ 6:20 am. Filed under ALL, Communications, Computers/Software, Electronics Design
 

TUESDAY October 14, 2008
SCV Electromagnetic Compatibility Chapter
Speaker: Prof. Jun Fan, Missouri University of Science and Technology
Time: Social/food at 5:30 PM; Presentation at 6:30 PM
Cost: none
Place: Applied Materials Bowers Cafeteria, 3090 Bowers Ave., Santa Clara
RSVP: not required
Web: www.ewh.ieee.org/r6/scv/emc

Ultra-thin power and ground plane pairs (embedded capacitance layers) present superior electrical performance in terms of charge delivery for logic transitions as well as noise mitigation.? This presentation will introduce a project of studying the embedded capacitance materials in a high-speed switch board design. ? Both performance and cost analysis will be discussed.

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