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September 25, 2008

Mtg: Parallel Computing with CUDA on Graphics Processing Units (GPUs)

by @ 7:33 am. Filed under ALL, Communications, Computers/Software, Semiconductors
 

WEDNESDAY October 1, 2008
Monterey Bay Subsection & SCV Computer Chapter
Speaker: Dr. John Nickolls and Dr. Massimiliano Fatica, Nvidia Corp.
Time: Refreshments and food at 6:00 PM; Presentation at 7:00 PM
Cost: none
Place: Simularium Room at the University of California in Santa Cruz, Room 180, Engineering Bldg 2, Santa Cruz
RSVP: by email to Marcelo Siero at siero@ee.com
Web: www.ee.com/gpu

The CUDA parallel programming model provides a straightforward means of describing inherently parallel computations. ? It lets programmers write scalable parallel programs with a minimal extension of the C language . NVIDIA’s Tesla GPU architecture delivers high computational throughput on massively parallel problems. ? This talk describes how to write CUDA C programs, outlines the parallel computing architecture of a 240-processor GPU, and surveys applications of CUDA to different problems and the parallel speedups obtained on GPUs over traditional sequential CPU codes.

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