2018 IEEE CAS Singapore Chapter Talks and Seminars

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Lifespan Protection: Upcoming Automotive Security & Privacy Challenges and Solutions

Prof. Mathias Dehm, Continental

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 25 January 2018 (Thursday)
Time : 2.30 PM - 3.30 PM
Venue : Meeting Room B2 (S2-B2b-77), School of EEE, NTU

Abstract

This talk gives a general introduction including the current challenges for automotive security and privacy. Additionally to the market, legislation on smart & autonomous vehicles requests new protection mechanisms for the whole vehicle lifespan.

In this talk, approaches to prevent vulnerabilities, detect anomalies in the fleet and react on incidents / vulnerabilities are described to achieve a lifespan protection. It also points out which role crypto agility and SW updates over the air will play in this scenario.

Speaker Biography

Mathias Dehm is leading the research activities for Security & Privacy in Continental. He has over 4 years’ experience in the Automotive Security & Privacy area in various positions. Before he started his career at Continental, he has done research on secure mobile ad-hoc networks in tactical environments at Rohde & Schwarz.Mathias is holding a PhD degree in electrical engineering from the Cork Institute of Technology in Ireland.

About Continental:

With sales of €40.5 billion in 2016, Continental is among the leading automotive suppliers worldwide and currently employs more than 220,000 employees in 56 countries. Information management in and beyond the vehicle is at the very heart of the Interior division. The product portfolio for different types of vehicles includes: instrument clusters, multifunctional and head-up displays, control units, access control and tire-information systems, radios, infotainment systems, input devices, control panels, climate control units, software, cockpits as well as services and solutions for telematics and Intelligent Transportation Systems. The Interior division employs more than 43,000 people worldwide and generated sales of approximately €8.3 billion in 2016.

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Application of Deep Learning Neural Networks for Infant Crying Detection and Recognition

Prof. Chuan-Yu Chang, National Yunlin University of Science and Technology, Taiwan

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 25 January 2018 (Thursday)
Time : 3.30 PM - 4.30 PM
Venue : Meeting Room B2 (S2-B2b-77), School of EEE, NTU

Abstract

Crying is the way that infants express their needs to their parents. Before learning how to express the emotions or physiological/ psychological requirements with language, infants usually express how they feel to parents through crying. Parents often feel worried and anxious when infant crying. To accurately determine the meanings of the newborn cries, deep learning neural networks were adopted to construct personalize crying models for different infants. Experimental results have revealed good performance of the proposed system.

Speaker Biography

Chuan-Yu Chang received the Ph.D. degree in electrical engineering from National Cheng Kung University, Taiwan, in 2000. He is currently a Distinguished Professor at the Department of Computer Science and Information Engineering and Dean of Research & Development, National Yunlin University of Science and Technology, Taiwan. His current research interests include computational intelligence and their applications to medical image processing, wafer defect inspection, emotion recognition, and pattern recognition. In the above areas, he has more than 150 publications in journals and conference proceedings.

He serves as an Associate Editor for two international journals including Multidimensional Systems and Signal Processing, and International Journal of Control Theory and Applications. He is a Fellow of IET, Life Member of IPPR, TAAI, and a senior Member of IEEE. He was the chair of IEEE Signal Processing Society Tainan Chapter (2013-2016).and the Representative for Region 10 of IEEE SPS Chapters Committee (2015-2017).

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Spectral Arithmetic: Modular Arithmetic and Architecture in Public-key Cryptography

Prof. Chak Chung CHEUNG, Ray, City University of Hong Kong

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 29 January 2018 (Monday)
Time : 10.00 AM - 11.00 AM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

Modular multiplication is the most time-consuming operation for cryptographic algorithms involving large integers, such as RSA encryption, ElGamal encryption, and Diffie-Hellman key exchange.

Hardware implementations reveal that more than 75% of the time is spent in the modular multiplication function within the RSA for more than 1024-bit moduli. The efficiency of modular multiplication has a direct impact on the performance of corresponding cryptosystems.

Spectral arithmetic has the advantage over the regular methods, such as the Toom-Cook method, of invoking the fast Fourier transform method to reduce its computational complexity. This superiority would become more significant when the bit-width increases. Although spectral methods outperform the regular ones for larger operand sizes, there still exist drawbacks which could limit its performance. One drawback refers to the zero-padding issue in the fast Fourier transform (FFT).

It has increased the computational complexity by doubling the transform length, as well as introduced the redundant operations for hardware realization. The second drawback refers to the conditional selection issue in the modular multiplication algorithm, where serial computing and complicated control logic are introduced due to the long carry propagation and data dependency, which may lead to the slow down of the overall algorithm efficiency. In addition, conditional selections may be vulnerable to timing attacks. The main objective of this talk is to give an overview of applying spectral arithmetic in the modular computations for public-key cryptography, and share possible solutions to these two issues and provide arithmetic and hardware architecture level improvements for high-performance computation and area-time efficient hardware design.

Speaker Biography

Ray C.C. Cheung received the BEng and MPhil degrees in computer engineering and computer science and engineering at the Chinese University of Hong Kong (CUHK), Hong Kong, in 1999 and 2001, respectively, and the PhD degree and DIC in computing at Imperial College London, London, United Kingdom, in 2007. After completing his PhD study, he received the Hong Kong Croucher Foundation Fellowship for his postdoctoral study in the Electrical Engineering Department, University of California, Los Angeles (UCLA).

In 2009, he worked as a visiting research fellow in the Department of Electrical Engineering, Princeton University, Princeton, NJ.

Currently, he is an associate professor in the Department of Electronic Engineering, City University of Hong Kong (CityU). He is the author of more than 120 journal and conference papers. His research team, CityU Architecture Lab for Arithmetic and Security (CALAS), focuses on the following research topics: reconfigurable trusted computing, applied cryptography, and high-performance biomedical VLSI designs. He is a member of the IEEE, the chair of IEEE HK Section CAS/COM Joint Chapter, the past chair of IEEE Industrial Electronics Society, Technical Committee, Electronic System-on-Chip (eSoC). the past vice-chair of IEEE HK Section Computer Chapter, the current IEEE HK Section Student Branch Counsellor (CityU).

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Applied Machine Learning: From Theory to Practice

YIN Hongxu, Ph.D candidate, Princetone University

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 01 February 2018 (Thursday)
Time : 2.30 PM - 3.30 PM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

This talk covers two perspectives of applied machine learning: efficiency and usefulness. We first discuss a human inspired algorithmic approach called NeST that generates accurate yet extremely compact deep neural networks. NeST starts with a seed NN architecture and iteratively tunes the architecture with gradient-based growth and magnitude-based pruning of neurons and connections. It can compress best known convolutional neural networks by 15.7x~34.1x without any loss of accuracy. All these results are the current state-of-the-art. We next present a multi-tier system called HDSS that tackles pervasive disease diagnosis based on wearable medical sensors and machine learning ensembles. We demonstrate the feasibility of such a system through six disease diagnosis modules aimed at four ICD-10-CM disease categories. Just the wearable medical sensor tier offers impressive diagnostic accuracies for various diseases such as arrhythmia, type-2 diabetes, urinary bladder disorder, renal pelvis nephritis, and hypothyroid.

Speaker Biography

Hongxu Yin received his B.Eng degree in EEE from NTU, Singapore, and M.A. degree in EE from Princeton University, Princeton, USA. He is currently a Ph.D. candidate in EE from Princeton University, Princeton, USA working with Prof. Niraj K. Jha. Hongxu was a recipient of the Princeton Graduate Fellowship. During his time at NTU, he was the recipient of Defense Science & Technology Agency gold medal, Thompson Asia Pacific Holdings gold medal, and the Industrial Orientation Book Prize. He was on dean’s list for all academic years. His research interests include compact deep neural network synthesis, and energy-efficient machine learning for healthcare and IoT applications.

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Zero-cost Security for Embedded Systems by Compressed Sensing

Prof. Riccardo Rovatti, University of Bologna, Italy

Organized by IEEE Circuits and Systems Singapore Chapter & National University of Singapore

"Sponsored by the IEEE Circuits and Systems Society under its Distinguished Lecturer Program"

Date : 23 February 2018 (Friday)
Time : 12.00 PM - 1.30 PM
Venue : EA-06-02, Engineering Block EA, Faculty of Engineering, NUS

Abstract

Compressed Sensing (CS) is a technique for the acquisition of signals using a number of measurements that is potentially much smaller than the number of samples at the Nyquist rate. It can be seen as an extremely simple encoding stage allowing a low cost compression. Yet, its intrinsic structure allows its re-use as a physical level public-key encryption layer thus preventing the need of a dedicated stage whenever the level of attained security is deemed sufficient.

This often applies to non-critical embedded applications with tight resource budgets that may thus benefit from a single stage that simultaneously performs data compression and encryption.

The talk describes the basics of CS and one of the most effective ways to maximize its performance as a compression stage known as rakeness-based design. Then it introduces the ideas behind its reuse as a low-cost encryption. Evaluations on the power and hardware saving due to a joint lossy compression and encryption are developed with emphasis on the fact that more of one public key can be distributed allowing the reconstruction of the signals with different levels of quality.

To match the resulting resource saving with the level of security provided, a rigorous cryptanalysis is carried out. Statistical ciphertext-only attacks are analyzed as well as known-plaintext attacks to prove that, though not perfectly secure in the Shannon sense, the method still provides a quite strong computational security.

The trade-off between the effectiveness of compression and offered security is sketched by focusing on the effect of rakeness-based design.

Speaker Biography

Riccardo Rovatti is currently a Professor of Electronics and Signal Processing at the University of Bologna and a permanent faculty member of ARCES, the Advanced Research Center on Electronic Systems for Information and Communication Technologies of the University of Bologna. He is the author of more than 300 technical contributions to international conferences and journal and of two volumes. His research interests currently focus on non-linear and statistical signal processing for, or by means of, electronic systems. In 2013 he received the IEEE CAS Society Guillemin-Cauer Award for one of his papers on Compressed Sensing. In 2012 he was elected IEEE fellow for contributions to nonlinear and statistical signal processing applied to electronic systems. In 2004 he received the IEEE CAS Society Darlington Award for one of his papers on EMI reduction by random modulation.

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Do We Really Know How to Compute Geometric Progressions?

Prof. Vassil Dimitrov, University of Calgary, Canada

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 27 March 2018 (Tuesday)
Time : 11.00 AM - 12.00 PM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

The problem of efficient computation of exponentiation has been studied with extreme details, due to its very high importance in implementing various applications. The same cannot be said about the problem of computing sums of consecutive powers of a number or a matrix (sometimes called Neumann matrix polynomials). This is somewhat unusual, because many problems in graph theory, coding theory, cryptography and, most notably, numerical analysis, can naturally lead to this computational task.

The seminar is aimed at unveiling some rather interesting and non-trivial computational results, associated with the division-free evaluation of the Neumann polynomials. Many of the upper bounds obtained are better than the best known estimates. The specific analysis of the computational complexity of based on some classical Markov chain analysis techniques.

The investigation on this particular problem has led to the discovery of double and multiple-base number systems. They have found a huge number of important applications in the domain of encryption and digital signal processing. To wit, many of the current records in elliptic curve cryptographic protocols (used, for example in block-chain applications) make a clever use of the multiple-base representation of integers.

Possible applications of the new polynomial evaluation methods will be discussed. They include algorithms for efficient solution of a system of linear equations, implementation of the Google's page-ranking algorithms and computer graphics. A large number of generalizations and additional applications will be presented. We will show how the evaluation of any polynomial can be converted into the evaluation of Neumann polynomials.

Speaker Biography

Dr. Vassil Dimitrov is a Professor at the Department of Electrical and Computer Engineering, University of Calgary, Canada since July 2001. Prior to this he hold an Associate Professor position at the University of Windsor, Canada. Dr. Dimitrov had a postdoctoral position at the VLSI Laboratory, University of Windsor, Canada (1996-1998); worked as a research scientist at Reliable Software Technologies, VA, USA (1998-1999) and as a chief research scientist at the Helsinki University of Technology (1999-2000).

Dr. Dimitrov main scientific interests are in the domain of efficient implementation of algorithms in cryptography, signal and image processing, digital watermarking and, lately, hardware implementation of homomorphic encryption schemes.

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The Development of the Multiple-base Number Systems: Applications in Digital Signal Processing and Cryptography

Prof. Vassil Dimitrov, University of Calgary, Canada

Organized by IEEE Circuits and Systems Singapore Chapter

Date : 29 March 2018 (Thursday)
Time : 11.00 AM - 12.00 PM
Venue : Lecture Theatre 3 (2.403), Building-2, Level-4, SUTD.

Abstract

The representation of integers as the sum of different powers of two and three, initially considered in the context of solving a very specific matrix polynomial evaluation problem, has led to the discovery of a new number system which proved to be a lot more useful than initially expected. The so-called double-base number system uses a two-dimensional representation (0-1 matrix) to represent integers and this particular representation is extremely sparse. We will demonstrate specific numerical results that showcase this feature of the (DBNS) and some interesting computational number theory problems that stem from this.

These specific properties of the DBNS can lead to proving some tough conjectures in the field of computer arithmetic related to the constant multiplication problem. Also, some very non-trivial bounds for the number of additions/subtractions will be unveiled.

The last two parts of the talk will present applications in the domain of cryptography and digital signal processing. We will also point out some rather challenging open problems.

Speaker Biography

Dr. Vassil Dimitrov is a Professor at the Department of Electrical and Computer Engineering, University of Calgary, Canada since July 2001. Prior to this he hold an Associate Professor position at the University of Windsor, Canada. Dr. Dimitrov had a postdoctoral position at the VLSI Laboratory, University of Windsor, Canada (1996-1998); worked as a research scientist at Reliable Software Technologies, VA, USA (1998-1999) and as a chief research scientist at the Helsinki University of Technology (1999-2000).

Dr. Dimitrov main scientific interests are in the domain of efficient implementation of algorithms in cryptography, signal and image processing, digital watermarking and, lately, hardware implementation of homomorphic encryption schemes.

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CMOS Design for DNA Detection Using Ion-Sensitive Field Effect Transistor

Prof. Pantelis Georgiou, Imperial College London

Organized by IEEE Circuits and Systems Singapore Chapter

"Sponsored by the IEEE Circuits and Systems Society under its Distinguished Lecturer Program"

Date : 23 April 2018 (Monday)
Time : 10.30 PM - 11.30 AM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

In the last decade, we have seen application of CMOS technology in healthcare providing novel solutions for early detection, diagnosis and therapy of disease. Specifically, in the area of DNA sensing and full genome sequencing, whereby the implementation of chemical sensors called Ion-Sensitive Field Effect Transistors (ISFETs) directly in CMOS, has enabled the design of large-scale arrays of millions of sensors which can conduct in-parallel detection of DNA. Furthermore, the scaling of CMOS with Moore’s law and the integration capability with microfluidics has enabled commercial efforts to make full genome sequencing affordable by companies such as Ion-Torrent and DNA electronics.

In this tutorial, I will first present the fundamentals and physical properties of DNA and how it can be detected using different modalities through the use of CMOS technology. I will then walk the audience through the design of ISFET sensors and instrumentation in CMOS working towards implementing large scale arrays which are currently being used in commercial systems. By the end of the tutorial the audience will have a good understanding of DNA and how it may be sensed in CMOS in addition to the challenges and solutions to be able to design large scale ISFET arrays for DNA detection systems.

Tutorial table of contents:
- DNA and its physical properties
- Applications of detecting DNA
- Methods of sensing DNA
- Ion-Sensitive Field Effect Transistors (ISFETs)
- Principle of operation and non-idealities
- Design of ISFETs in CMOS
- Design of Instrumentation
- State of the art ISFET arrays

Speaker Biography

Pantelis Georgiou currently holds the position of Senior Lecturer at Imperial College London within the Department of Electrical and Electronic Engineering. He is the head of the Bio-inspired Metabolic Technology Laboratory in the Centre for Bio-Inspired Technology; a multi-disciplinary group that invents, develops and demonstrates advanced micro-devices to meet global challenges in biomedical science and healthcare. His research includes ultra-low power micro-electronics, bio-inspired circuits and systems, lab-on-chip technology and application of micro-electronic technology to create novel medical devices. One of his key research areas is new technologies for treatment of diabetes such as the artificial pancreas but also develops novel Lab-on-Chip technology with application in genomics and diagnostics targeted towards infectious disease and antimicrobial resistance (AMR), in addition to wearable technologies for rehabilitation of chronic conditions.

Dr. Georgiou graduated with a 1st Class Honors MEng Degree in Electrical and Electronic Engineering in 2004 and Ph.D. degree in 2008 both from Imperial College London. He then joined the Institute of Biomedical Engineering as Research Associate until 2010, when he was appointed Head of the Bio-inspired Metabolic Technology Laboratory. In 2011, he joined the Department of Electrical & Electronic Engineering, where he currently holds an academic faculty position. He conducted pioneering work on the silicon beta cell and is now leading the project forward to the development of the first bio-inspired artificial pancreas for treatment of Type I diabetes. In addition to this, he made significant contributions to the development of integrated chemical-sensing systems in CMOS. He has pioneered the development of the Ion-Sensitive Field Effect Transistor, an integrated pH sensor which is currently being used in next generation DNA sequencing machines, demonstrating for the first time its use in low-power weak-inversion, and its capability in a multimodal sensing array for Lab-on-Chip applications. Dr. Georgiou is a senior member of the IEEE and IET and serves on the BioCAS and Sensory Systems technical committees of the IEEE CAS Society. He is an associate editor of the IEEE Sensors and TBioCAS journals. He is also the CAS representative on the IEEE sensors council. In 2013 he was awarded the IET Mike Sergeant Achievement Medal for his outstanding contributions to engineering and development of the bio-inspired artificial pancreas.

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Brain-like Cognitive Engineering Systems

Prof. Jan M. Rabaey, University of California at Berkeley

Organized by Department of Electrical and Computer Engineering, NUS & IEEE Circuits and Systems Singapore Chapter

Date : 15 May 2018 (Tuesday)
Time : 12.00 PM - 1.00 PM
Venue : E3-06-01, Engineering Blk E3, Faculty of Engineering, NUS

Abstract

Technology scaling and advancing device technologies have played a major role in making computational engines continuously more efficient. Yet that efficiency is still a couple of orders of magnitude away from what the human brain is capable of. Bridging that gap using traditional models and techniques is becoming increasingly harder due to implicit limitations and/or bounds in the devices, architectures and computational paradigms. The main question to ask is if computational techniques inspired by our current understanding of how the brain functions could help to overcome some if not most of these limitations. In this presentation we will explore a number of the properties of the brain function, and how these can/may map into the emerging nanotechnologies. Just to name a few: approximate pattern-based computation; close intertwining of logic and memory; 3D integration; learning-based programing model; sparsity and function-specific mapping. These observations will be illustrated with a set of concrete examples using a hyper-dimensional computing approach.

Speaker BiographyThe Swarm:Users:jan:Pictures:General Pictures:Rabaey 2015.jpg

Jan Rabaey holds the Donald O. Pederson Distinguished Professorship at the University of California at Berkeley. Before joining the faculty at UC Berkeley, he was a research manager at IMEC from 1985 until 1987. He is a founding director of the Berkeley Wireless Research Center (BWRC) and the Berkeley Ubiquitous SwarmLab, and has served as the Electrical Engineering Division Chair at Berkeley twice.

Prof. Rabaey has made high-impact contributions to a number of fields, including advanced wireless systems, low power integrated circuits, mobile devices, sensor networks, and ubiquitous computing.  His current interests include the conception of the next-generation distributed systems, as well as the exploration of the interaction between the cyber and the biological world.

He is the recipient of major awards, amongst which the IEEE Mac Van Valkenburg Award, the European Design Automation Association (EDAA) Lifetime Achievement award, the Semiconductor Industry Association (SIA) University Researcher Award, and the SRC Aristotle Award. He is an IEEE Fellow, a member of the Royal Flemish Academy of Sciences and Arts of Belgium, and has received honorary doctorates from Lund (Sweden), Antwerp (Belgium) and Tampere (Finland).  He has been involved in a broad variety of start-up ventures, including Cortera Neurotechnologies, of which he is a co-founder.

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Let's Get Physical: Adding Physical Dimensions to Cyber Systems

Prof. Alberto Sangiovanni Vincentelli, University of California at Berkeley

Organized by Department of Electrical and Computer Engineering, NUS & IEEE Circuits and Systems Singapore Chapter

Date : 17 May 2018 (Tuesday)
Time : 12.00 PM - 1.00 PM
Venue : E5-03-20, Engineering Block E5, Faculty of Engineering, NUS

Abstract

Technology advances are creating major shifts in the industrial landscape. Traditional sectors such as transportation, medical and avionics, are witnessing fundamental changes in the supply chain and in the content where the interactions between the physical world and the computing world are becoming increasingly tight. Cyber Physical Systems, Systems of Systems, Internet of Things, Industrie 4.0, Swarm Systems and The Fog are all sectors that attract massive attention from the research communities and massive investment from industry. These concepts are tightly intertwined and describe a movement towards a fully interconnected planet where billions of devices interact via a complex mesh of wireless and wired communication infrastructures. The most compelling vision for the future of technology and industry is one where a swarm of devices is connected with the cloud to provide platforms for myriad of new applications. In this new world, new companies will arise and established ones will have to change radically their business model. The increasing sophistication and heterogeneity of these systems requires radical changes in the way sense-and-control platforms are designed to regulate them.

In this presentation, I highlight the economic potential of CPS, their role in autonomous driving, and some of the design challenges due to the complexity, heterogeneity and power consumption of CPS.

Speaker Biography

Alberto Sangiovanni Vincentelli holds the Edgar L. and Harold H. Buttner Chair at the Department of EECS, University of California, Berkeley. He is member of the Advisory Board of the Lester Center for Innovation of the Haas School of Business and of the Berkeley Roundtable of the International Economy (BRIE), and is Honorary Professor at Politecnico di Torino. He is an IEEE and an ACM Fellow, and a member of the National Academy of Engineering. Recipient of the Kaufman Award of the Electronic Design Automation Council for “pioneering contributions to EDA” and of the IEEE/RSE Maxwell Medal “for groundbreaking contributions that have had an exceptional impact on the development of electronics and electrical engineering or related fields”. He authored over 950 papers and 17 books. He has co-founded enterprises in US and Europe including Cadence and Synopsys, the two largest Electronic Design Automation companies. He has advised Intel, IBM, HP, General Motors, ATT, GE, Kawasaki Steel, Fujitsu, Hitachi, Mercedes Benz, BMW, Magneti Marelli, Pirelli, Telecom Italia, and sits on the Board of Directors of Cadence, KPIT Technologies, Sonics, Expert System and Cogisen. He is the Chairman of the Board of UltraSoC, and Expert System USA.

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Macroscopy to Microscopy: A journey traversing through biomedical imaging / instrumentation, application to pre-clinical studies and high performance computing

Prof. Srivathsan Vasudevan, Indian Institute of Technology

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Bio Devices and Signal Analysis (VALENS), School of EEE, NTU 

Date : 8 June 2018 (Friday)
Time : 10.30 AM - 11.30 AM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

This talk governs the journey of a young investigator who started with an interest in development of biomedical diagnostics for clinical applications. During the process of this development, different clinical applications were touched upon. Concurrently, high performance computing applying to computational chemistry also excited this investigator.

This talk would briefly touch upon the capabilities required for any biomedical imaging technique at the microscopic and macroscopic level to cater to the present needs of the biomedical research community. Subsequently, the talk would introduce the concept of photoacoustic imaging which can be applied to tomographic tissue imaging as well as microscopy. The non-invasive nature of the technique with no fluorescent tags has found wide applications of this technique. These applications would be discussed.

An exploration into high-performance computing applied to computational chemistry would be touched upon before concluding the talk.

Speaker Biography

Srivathsan Vasudevan is an Electrical Engineer. After a short stint at Cognizant Technology Solutions, Srivathsan moved to Nanyang Technological University, Singapore for his Ph.D. His research work at NTU concentrates on developing a photothermal microscopy for cellular level studies. After completing his thesis, Srivathsan was working for Singapore General Hospital on prostate cancer. In 2011, he joined Indian Institute of Technology Indore as an Asst. Professor in the Discipline of Electrical Engineering. He has been exploring Photoacoustic imaging as a non-invasive technique for clinical imaging.

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Intra Prediction in Versatile Video Coding (VVC)

Prof. Nam LING, IEEE Fellow, Sanfilippo Family Chair Professor, Chair, Department of Computer Engineering, Santa Clara University

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU 

Date : 3 July 2018 (Tuesday)
Time : 10.00 AM - 10.30 AM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

For this talk, we first briefly address the latest Versatile Video Coding (VVC) and the corresponding VTM test model. We then focus on intra prediction. High Efficiency Video Coding (HEVC) standard introduced 35 intra prediction modes in order to improve intra prediction performance. To signal mode of the current block to the decoder a list of three most probable modes (MPM) is derived based on the modes of the two neighboring blocks. Similarly, six MPMs are used in the recent Joint Exploration Model (JEM) for Versatile Video Coding (VVC) to accommodate the increased number to 67 intra prediction modes. One method to achieve this is to use an extension of HEVC approach. The other one employs the modes of the five neighboring blocks, together with their derived modes and default modes, in an ordered MPM candidate list. Our contribution is to use case-based multiple candidate lists considering neighbor’s modes, prediction unit’s shape, and depth. For each defined case, the corresponding list is sorted based on the probability of each candidate. The index of a case is computed based on the defined status values. Experimental results show BD rate savings. In this talk, we also highlight some of the current research projects in our lab.

Speaker Biography

Ling 5Nam Ling received the B.Eng. degree from the National University of Singapore and the M.S. and Ph.D. degrees from the University of Louisiana, Lafayette, U.S.A. He is currently the Sanfilippo Family Chair Professor (University Endowed Chair) of Santa Clara University (U.S.A) and the Chair of its Department of Computer Engineering. From 2002 to 2010, he was an Associate Dean for its School of Engineering. Currently, he is also a Chair Professor for Fuzhou University, a Cuiying Chair Professor for Lanzhou University, a Distinguished Professor for Xi’an University of Posts & Telecommunications, a Guest Professor for Tianjin University, a Guest Professor for Shanghai Jiao Tong University (China), and a Consulting Professor for the National University of Singapore. He has more than 200 publications (including books) in video/image coding and systolic arrays. He also has seven adopted standards contributions and has filed/granted more than 20 U.S./European/PCT patents. He is an IEEE Fellow due to his contributions to video coding algorithms and architectures. He is also an IET Fellow. He was named IEEE Distinguished Lecturer twice and was also an APSIPA Distinguished Lecturer. He received the IEEE ICCE Best Paper Award (First Place) and the IEEE Umedia Best Paper Award (twice). He received six awards from the University, four at the University level (Outstanding Achievement, Recent Achievement in Scholarship, President’s Recognition, and Sustained Excellence in Scholarship) and two at the School/College level (Researcher of the Year and Teaching Excellence). He has served as Keynote Speaker for IEEE APCCAS, VCVP (twice), JCPC, IEEE ICAST, IEEE ICIEA, IET FC & U-Media, IEEE U-Media, and Workshop at XUPT (twice), as well as a Distinguished Speaker for IEEE ICIEA. He is/was General Chair/Co‑Chair for IEEE Hot Chips, VCVP (twice), IEEE ICME, IEEE U-Media (four times), and IEEE SiPS. He was an Honorary Co-Chair for IEEE Umedia. He has also served as Technical Program Co‑Chair for IEEE ISCAS, APSIPA ASC, IEEE APCCAS, IEEE SiPS (twice), DCV, and IEEE VCIP. He was Technical Committee Chair for IEEE CASCOM TC and IEEE TCMM, and has served as Guest Editor/Associate Editor for IEEE TCAS‑I, IEEE J-STSP, Springer JSPS, Springer MSSP, and other journals. He has delivered more than 120 invited colloquia worldwide and has served as Visiting Professor/Consultant/Scientist for many institutions/companies.

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Supply Modulators: Fundamentals, Design Challenges and Tradeoffs for High Power-Efficiency, High-Bandwidth, and Low Noise

Dr. Tong GE, Nanyang Technological University

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 3 July 2018 (Tuesday)
Time : 10.30 AM - 11.00 AM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

Short battery lifespan is one of the major challenges of mobile communication devices and is exacerbated by the demand for ever-increasing speed and data.  This is in part due to the adopted communication protocols, e.g. LTE and LTE-A, that employ spectrally efficient modulation schemes and wide bandwidth.  These advanced communication protocols impose stringent requirements on the linearity of the Radio Frequency (RF) Power Amplifier (PA), yet requiring high Peak-to-Average-Power-Ratio – translating to low power-efficiency in conventional RF PAs, hence reduced battery-life.    Of the various reported methods to improve the power-efficiency of RF PAs, the Envelope Tracking (ET) is one of the most efficacious means.

In this talk, we will provide a comprehensive and critical overview on the state-of-the-art supply modulator designs, including the design challenges towards simultaneous high power-efficiency, high bandwidth and low output noise. We will also present, on the basis of the fundamental and analytical investigations, the design tradeoffs between various parameters, and how these parameters can be optimized.

Speaker Biography

Ge TongDr. Ge Tong received her B.Eng and Ph.D both from NTU and she is currently working as a senior Research Scientist and leading several research projects as PI and co-PI with total research funding of >1.5M dollars.  She is a multi-disciplinary researcher, and her research includes high speed high power switching mode IC such as Ultra high fidelity and ultra low noise audio Class D amplifier, high power-efficiency Envelope Tracking RF Power Amplifiers, high bandwidth Supply Modulator for RF PAs, and etc.   Her research also includes flexible electronics, organic electronics and the applications for healthcare and IoT devices.    She has published over 60 papers in premiere IEEE journals and conferences, and holds over 20 patents and patent applications.   Two of her patents have licensed to commercial companies.  She has given 9 invited talks at major IEEE conferences.   She served as an Associate Editor of the IEEE Transactions on circuits and systems, and organized several IEEE premiere conferences as Publicity Chair/Co-Chair, Publication Chair/co-Chair, and Technical Chair/co-Chair, etc.   She also served as the best paper review committee for the 2018 IEEE International Symposium on Circuits and Systems (Biomedical Circuits and Systems track).

Dr Ge received the 2018 Darlington Best Paper Award, and is one of the three finalists for the prestigious L’Oreal Singapore For Women In Science National Fellowship 2016.  She is also recognized as an expert in Class D amplifiers by Bruel & Kjaer and her profile is included in Bruel & Kjaer Wave magazine and their website.

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The First Step for AI-based Deep Language Understanding

Dr. Zhaoxia WANG, Agency for Science, Technology and Research (A*STAR)

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 2 August 2018 (Thursday)
Time : 10.30 AM - 11.30 AM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

With the advent of the Internet, more and more people prefer to post their feedback, reviews, and opinions through the social media platform, such as Facebook, Twitter, Chinese Weibo, and so on. Sentiment analysis of such data is becoming a fast and effective way of evaluating public opinion and sentiment for addressing practical problems, such as predicting consumer preferences or sensing public emotions towards some products, services or issues. In addition, the current AI systems and robots developed still cannot truly understand human language. Therefore, the motivation of this research is two folds: (i) To Realize Human Like Real-World Deep Language Understanding of Text; and (ii) To Develop Human Like  Brand New AI Technologies for Big Data Analysis. As the first step to realize the two goals, in this talk, the presenter will introduce sentiment analysis of text, which includes learning based, non-learning based and hybrid methods. For learning based methods, different enhancements, such as feature selection, negation dealing, and emoticon handling are studied to improve the performance of existing machine-learning methods; for non-learning based methods or hybrid methods, a series of patentable technologies are proposed to address the limitations of the existing methods.

Speaker Biography

Dr. Zhaoxia Wang is a data and AI scientist at the Institute of High Performance Computing (IHPC), Agency for Science, Technology and Research (A*STAR), Singapore. She received her MS and PhD from the College of Information Technical Science, Nankai University, Tianjin, P. R. of China. After her PhD studies, she spent 2 years as postdoctoral researcher at Tianjin University. She was promoted to Associate Professor of Tianjin University of Technology in 2004. From Aug. 2005 to Dec. 2005, she was awarded and funded as a visiting scholar at the School of Computer Science and the Centre of Excellence for Research in Computational Intelligence and Applications (CERCIA), University of Birmingham, UK. She worked for the National University of Singapore (NUS) from 2008 to 2011 before joining IHPC, A*STAR. She is a member of IEEE and has been an Associate Editor of the Electronic Commerce Research and Applications (ECRA) journal since 2013.  She has been awarded an Adjunct Professorship of Tianjin University since 2015. As an expert in AI, data analytics, and NLP (focused on fine-grained sentiment and emotion analysis), she has successfully led and delivered more than 10 research as well as industry projects as Principal Investigator (PI), co-PI and Technical Lead during her 10+ years of working experience in Singapore since 2008, and had successfully delivered 6 projects as PI or co-PI in her early career as an associate professor from 2004 to 2008 in China. She spearheaded the development of 5+ quality IPs as the first inventor and more than 10 companies have signed evaluation licenses or commercial licenses on her patents. She is currently the research lead in the big data analytics and AI research area. Her current research interests include data analytics, machine learning, text mining, natural language processing, fine-grained sentiment and emotion analysis, opinion-based stock marketing trending analysis, social intelligence, social media content mining and analysis, safety and risk analysis, AI & CI and their applications.

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Causal Analysis and an Example in Neurology

Dr Haoqi SUN, Agency for Science, Postdoc Research Fellow, Department of Neurology, Massachusetts General Hospital

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Bio Devices and Signal Analysis (VALENS), School of EEE, NTU

Date : 4 October 2018 (Thursday)
Time : 3.00 PM - 3.45 PM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

Human thinks in a causal way. Science tries to uncover causal mechanisms. Causal analysis aims at establishing causality from both observational and experimental data, and has largely impacted social sciences such as economics and policy. Can causal analysis be used in other fields like neurology and neuroscience? For example, recent studies have shown a mixed relationship between brain burst suppression (BS) and mortality, where some significant while others inconclusive. Whether these links are causal remains unclear either. Here we quantify the causal effects between burst suppression, drugs and mortality in 270 critically ill and mechanically ventilated patients. Continuous electroencephalography (EEG) data were collected during their stay in the ICU. Trained clinical neurophysiologists classified consecutive 8-hour epochs of EEG into burst suppressed and non-suppressed. Other covariates such as age, Acute Physiology and Chronic Health Evaluation II (APACHEII), and Charlson comorbidity index (CCI) were also recorded at admission. The causal effect of each arrow in the causal graph model was estimated. The causal mediation analysis was done to compute the relative contribution of the causal mechanisms. The results provide theoretical evidence for possible clinical interventions to improve the outcome. This presentation has two parts, including a brief introduction to causal analysis, and the above application in neurology.

Speaker Biography

Haoqi Sun received the Ph.D. degree from Interdisciplinary Graduate School, Nanyang Technological University in 2017. He is currently a postdoc research fellow in the Department of Neurology, Massachusetts General Hospital. He received Glenn/AFAR Breakthroughs in Gerontology (BIG) Awards and Departmental Awards for Top Clinical Research Abstract in 2018. He is interested in using computational approaches such as machine learning and causal analysis to study brain functions and pathologies at both macro and micro scales.

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Data Science in SingHealth Duke-NUS Academic Medical Centre

Prof LIU Nan, Assistant Professor, Duke-NUS Medical School, National University of Singapore Principal Investigator, Health Services Research Centre, SingHealth

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Bio Devices and Signal Analysis (VALENS), School of EEE, NTU

Date : 4 October 2018 (Thursday)
Time : 3.45 PM - 4.30 PM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

The new era of healthcare ushered in by wide adoption of intelligent technologies has been rapidly changing. Data science, artificial intelligence, smart sensors and Internet of Things (IoT) are among the most active and emerging trends in revolutionising traditional healthcare systems. Technologies such as high performance processors, surgical robots, and wearable body sensor networks have enabled us to turn dreams into reality. We are witnessing how advances in technologies are being leveraged, by the healthcare sector to create smart health systems, and by the government to foster the deployment of a smart nation. This talk aims to bring the audience the latest development on data science research in SingHealth Duke-NUS Academic Medical Centre.

Speaker Biography

Dr Liu Nan is a Principal Investigator at SingHealth Health Services Research Centre and an Assistant Professor at Duke-NUS Medical School, National University of Singapore. He is actively working on health data science, health services research, cardiology, emergency and critical care, health informatics and medical innovation. He has been awarded research grants from National Medical Research Council (NMRC), National Health Innovation Centre (NHIC), and SingHealth Foundation. Dr Liu is serving as an Academic Editor for four international journals, including Computers in Biology and Medicine, and PLOS ONE. He has received many international and national awards, including 2015 Meritorious Paper Award from Computers in Biology and Medicine journal, Grand Prize from Singapore Tech-Factor Challenge 2017, and Paul Dudley White International Scholar Award from American Heart Association.

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A Cognitive Architecture for Object Recognition in Video

Prof. Jose Principe, Distinguished Professor of Electrical Engineering, University of Florida

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Bio Devices and Signal Analysis (VALENS), School of EEE, NTU

Date : 5 November 2018 (Monday)
Time : 10.30 AM - 11.30 AM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

This talk describes our efforts to abstract from the animal visual system the computational principles to explain images in video. We develop a hierarchical, distributed architecture of dynamical systems that self-organizes to explain the input imagery using an empirical Bayes criterion with sparseness constraints and dual state estimation. The interpretation of the images is mediated through causes that flow top down and change the priors for the bottom up processing. We will present preliminary results in several data sets.

Speaker Biography

José Carlos Príncipe_1Jose C. Principe (M’83-SM’90-F’00) is a Distinguished Professor of Electrical and Computer Engineering and Biomedical Engineering at the University of Florida where he teaches advanced signal processing, machine learning and artificial neural networks (ANNs) modeling. He is BellSouth Professor and the Founder and Director of the University of Florida Computational NeuroEngineering Laboratory (CNEL) www.cnel.ufl.edu . His primary area of interest is processing of time varying signals with adaptive neural models. The CNEL Lab has been studying signal and pattern recognition principles based on information theoretic criteria (entropy and mutual information).

Dr. Principe is an IEEE Fellow. He was the past Chair of the Technical Committee on Neural Networks of the IEEE Signal Processing Society, Past-President of the International Neural Network Society, and Past-Editor in Chief of the IEEE Transactions on Biomedical Engineering. He is a member of the Advisory Board of the University of Florida Brain Institute.  Dr. Principe has more than 800 publications.  He directed 92 Ph.D. dissertations and 65 Master theses.  He wrote in 2000 an interactive electronic book entitled “Neural and Adaptive Systems” published by John Wiley and Sons and more recently co-authored several books on “Brain Machine Interface Engineering” Morgan and Claypool, “Information Theoretic Learning”, Springer, and “Kernel Adaptive Filtering”, Wiley.

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Cross-Space Crowd Sensing: Concepts, Technologies, and Practices

Prof. Zhiwen Yu, Northwestern Polytechnical University

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 12 November 2018 (Monday)
Time : 10.30 AM - 11.30 AM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

Crowd sensing is a new sensing paradigm that uses individual sensing capability to accomplish complex social sensing tasks. Human beings live and communicate in both cyber and physical spaces. Crowd sensing can be realized by actively recruiting participants in the cyber space and also opportunistically collecting crowd footprints in the cyber space. We propose a new concept named Cross-Space Crowd Sensing that aims at combining the different sensing capabilities in both cyber and physical spaces, and also fusing human implicit intelligence in understanding the sensory data. In this talk, I will introduce the definition of cross-space crowd sensing, main research challenges, and present our early works in this area.

Speaker Biography

image.pngDr. Zhiwen Yu is currently a professor of the School of Computer Science, Northwestern Polytechnical University, China. He has worked as an Alexander Von Humboldt Fellow at Mannheim University, Germany from Nov. 2009 to Oct. 2010, a research fellow at Kyoto University, Japan from Feb. 2007 to Jan. 2009, and a post-doctoral researcher at Nagoya University, Japan in 2006-2007. His research interests cover ubiquitous computing, mobile social networks, and human-computer interaction. He has served as an associate/guest editor for a number of international journals, such as IEEE Transactions on Human-Machine Systems, IEEE Communications Magazine, and ACM Transactions on Intelligent Systems and Technology. He is the General Co-Chair of SmartCity 2016, CPSCom 2015, General Chair of UIC 2014, the Program Chair of EUC 2013, HumanCom 2012, and UIC 2010, the Vice Program Chair of PerCom 2015, the Workshop Chair of UbiComp 2011. He has published around 150 scientific papers in refereed journals and conferences, e.g., ACM Computing Surveys, IEEE TKDE, IEEE TMC, IEEE THMS, ACM TKDD, UbiComp, PerCom, etc. Zhiwen Yu is a senior member of IEEE, a distinguished member of CCF (China Computer Federation) and the vice chair of CCF Pervasive Computing Technical Committee. He received the CCF Young Scientist Award in 2011, the CPSCom'13/GPC'12/AMT'12/UIC'09 best paper awards, the Humboldt Fellowship in 2008, and the CCF Excellent Doctoral Dissertation Award in 2006. He got the National Science Fund for Distinguished Young Scholars in 2017.

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Simple Formulae for the Synthesis of Classical Recursive Digital Filters and Generalizations

Prof. Tapio Saramaki, Tampere University of Technology

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 13 November 2018 (Tuesday)
Time : 3.00 PM - 4.00 PM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

Two months ago while planning the trip to Singapore and Shanghai, the dream was to make the design of classical recursive digital filters GREAT AGAIN. The plan was to generate as simple as possible formulas for designing the present classical digital filters as well as to provide as wide as possible generalizations for them. Time, however, turned out to be AGAIN limited.

This talk mainly concentrates on the trial of making the design of existing classical filters as straightforward as possible. For designing lowpass filters, the pioneering ideas of Sidney Darlington is followed together with appropriate modifications. Traditionally, the design of highpass, bandpass, and bandstop filters is performed based on lowpass prototype filters by using lowpass-to-highpass, lowpass-to-bandpass and lowpass-to-bandstop transformations. This talk combines the parameters of the lowpass prototype filter and the transformation so that the overall design becomes very easy to perform. For this purpose, more than two decades old lecture notes were found.

A general-purpose MATLAB program based on the ideas of this talk is also introduced. Finally, the dream of generalizing the existing classical recursive digital filters as much as possible is considered.

Speaker Biography

Tapio Saramaki was born in Orivesi, Finland, on June 12, 1953. He has received the Diploma Engineer (with honors) and Doctor of Technology (with honors) degrees in electrical engineering from the Tampere University of Technology (TUT), Tampere, Finland, in 1978 and 1981, respectively. Since 1977, he has held various research and teaching positions at TUT. He was a Professor of Digital Signal Processing and a Docent (Adjunct Professor) of Communications until becoming an Emeritus Professor in 2016.

Dr. Saramaki is also a Co-Founder and a System-Level Designer of VLSI Solution, Finland, specializing in efficient VLSI implementations of both analog and digital signal processing algorithms for various applications. His research interests are in digital signal processing, especially in filter and filter bank design, efficient VLSI implementations of DSP algorithms, and communications application as well as approximation and optimization theories. He has contributed to more than 300 international journals and conference articles as well as more than 10 international book chapters. He holds three worldwide used patents.

Dr. Saramaki has paid numerous research visits to many international universities. The countries include Argentina, Brazil, Canada, China, India, Norway, Mexico, Singapore, and USA. He is the Fellow of IEEE and the Russian A. S. Popov Society for Radio-Engineering, Electronics, and Communications. He was a recipient of the 1987 and 2007 IEEE Circuits and Systems Society’s Guillemin-Cauer Awards as well as two other best paper awards. He is a founding member of the Median-Free Group International.

Dr. Saramaki has been actively taking part in many duties in the IEEE Circuits and Systems Society’s DSP Committee by being a Chairman (2002-2004), a Distinguished Lecturer (2002-2003), and a Track or a Co-Track Chair for many ISCAS symposiums (2003-2005 and 2011-2019). Furthermore, he has been on the technical committee of several international conferences including, among others, DSP, DSPA, EUSIPCO, ECCTD, IASTED, ICECS, ISPA, and NORCAS.

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Feature LMS Algorithms: Exploiting Hidden Sparsity

Prof. Paulo S. R. Diniz, Universidade Federal do Rio de Janeiro

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 13 November 2018 (Tuesday)
Time : 4.00 PM - 5.00 PM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

We have been witnessed a growing research activity to advance new strategies to detect and exploit underlying sparsity in the parameters of physical models. In many cases, the sparsity is not explicit in the relations among the parameters coe_cients requiring some suitable tools to reveal the potential sparsity. This presentation shows a family of LMS-type algorithms, collectively named Feature LMS (F-LMS) algorithms, aimed at exposing some hidden features of the unknown parameters. As a byproduct, the new algorithms will increase the convergence speed and reduce the steady-state mean-squared error, in comparison with the classical LMS solution. The main idea is to apply linear transformations, by means of the so-called feature matrices, to reveal the sparsity hidden in the coe_cient vector, followed by a sparsity-promoting penalty function to exploit the exposed sparsity. For illustration, a few F-LMS algorithms for lowpass and highpass systems are also introduced by using simple feature matrices that require only trivial operations. The F-LMS algorithms do not fully bene_t from the potential computational complexity reduction originating from the sparsity property; as a result, we propose a new low-complexity feature stochastic gradient (LF-SG) algorithm to address this issue. The resulting LF-SG algorithm capitalizes on the exposed sparsity to reduce the number of numerical operations substantially. Simulation results demonstrate that the proposed F-LMS and LF-SG algorithms bring about several performance improvements whenever the unknown sparsity of the parameters is exposed.

Speaker Biography

Paulo S. R. Diniz was born in Niter_oi, Brazil. He received the Electronics Eng. Degree (Cum Laude) from the Federal University of Rio de Janeiro (UFRJ) in 1978, the M.Sc. degree from COPPE/UFRJ in 1981, and the Ph.D. from Concordia University, Montreal, P.Q., Canada, in 1984, all in electrical engineering. Since 1979 he has been with the Department of Electronics and Computer Engineering UFRJ. He has also been with the Program of Electrical Engineering (the graduate studies dept.), COPPE/UFRJ, since 1984, where he is presently a Professor. He served as Undergraduate Course Coordinator and as Chairman of the Graduate Department. His teaching and research interests are in analog and digital signal processing, adaptive signal processing, digital communications, wireless communications, multi-rate systems, stochastic processes, and electronic circuits. From January 1991 to July 1992, he was a Visiting Research Associate in the Department of Electrical and Computer Engineering of University of Victoria, Victoria, B.C., Canada. He also held a Docent position at Helsinki University of Technology (now Aalto University). From January 2002 to June 2002, he was a Melchor Chair Professor in the Department of Electrical Engineering of University of Notre Dame, Notre Dame, IN, USA. He has published over 100 refereed papers in journals and over 200 conference papers in some of these areas, and wrote the text books ADAPTIVE FILTERING: Algorithms and Practical Implementation, Fourth Edition, Springer, NY, 2013, and DIGITAL SIGNAL PROCESSING: System Analysis and Design, Second Edition, Cambridge University Press, Cambridge, UK, 2010 (with E. A. B. da Silva and S. L. Netto), and the monograph BLOCK TRANSCEIVERS: OFDM and Beyond, Morgan & Claypool, New York, NY, 2012 (W. A. Martins, and M. V. S. Lima). He is a Fellow of IEEE and EURASIP.

He was the General co-Chair of the IEEE ISCAS2011. He has also served as Vice President for region 9 of the IEEE Circuits and Systems Society and as Regional Director of the IEEE Signal Processing Society from 2015 to 2017. He has served as associate editor for the following Journals: IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing from 1996 to 1999, IEEE Transactions on Signal Processing from 1999 to 2002, and the Circuits, Systems and Signal Processing Journal from 1998 to 2002. He was a distinguished lecturer of the IEEE Circuits and Systems Society for the year 2000 to 2001, and of the IEEE Signal Processing Society in 2004. He also received the 2004 Education Award and the 2014 Charles Desoer Technical Achievement Award both from IEEE Circuits and Systems Society. He also holds some best-paper awards from conferences and an IEEE journal. Prof. P. S. R. Diniz is a member of the National Academy of Engineering (ANE), and of the Brazilian Academy of Science (ABC). He has received the Rio de Janeiro State Scientist award, from the Governor of Rio de Janeiro state.

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Complex Action Recognition in Constrained and Unconstrained Videos

Prof. Q.M. Jonathan Wu, University of Windsor

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 23 November 2018 (Friday)
Time : 4.00 PM - 4.45 PM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

Video analysis has a crucial role in the visual learning applications such as autonomous driving cars, video retrieval, intelligent monitoring systems, and tele-immersion machines. Most of the video analysis applications highly depend on the human action recognition frameworks. Nowadays, a variety of algorithmic blocks including video feature extraction, feature encoding, and classification methods have been proposed to recognize human actions in pre-segmented video datasets. However, in most of the real-world visual learning applications, the captured videos are not pre-segmented. In other words, the recorded videos may contain several actions in one shot. Consequently, the available action recognition frameworks fail to recognize the action since the real-world videos include a long and complicated temporal structure. To address this problem, we propose efficient video clustering algorithms based on extended ELM-type methodology to temporally segment the constrained and unconstrained videos into plausible non-overlapping actions. Then, we detect and recognize the key action among multiple temporal clusters in each video. We propose an unsupervised learning methodology to represent a video cluster based on the orders of vital frames. Finally, we offer a hybrid classifier to efficiently leverage different kernels and informative features for categorizing a given video cluster into a proper class of action. A brief overview of other research activities, related to computer vision and deep learning, in the presenter’s laboratory is also provided. Applications have been extended towards intelligent transportation systems, surveillance and security, face and gesture recognition, vision-guided robotics, and bio-medical imaging, among others.

Speaker Biography

Prof. Jonathan Wu received his doctoral degree in electrical engineering from the University of Wales, Swansea, U.K., in 1990.He has been affiliated with the National Research Council of Canada for ten years since 1995, where he became a senior research officer and a group leader. He is currently a professor in the Department of Electrical and Computer Engineering at University of Windsor, Windsor, ON, Canada. He has authored over 350 peer-reviewed papers in computer vision, image processing, intelligent systems, robotics, and integrated microsystems. His current research interests include machine learning, 3D computer vision, interactive multimedia, human-machine interaction, sensor analysis and fusion, and autonomous robotic systems.

Dr. Wu holds the Tier 1 Canada Research Chair in automotive sensors and information systems. He has served on technical program committees and international advisory committees for many prestigious conferences. He was an associate editor of the IEEE TRANSACTIONS ON SYSTEMS, MAN, AND CYBERNETICS PART A, the IEEE TRANSACTION ON NEURAL NETWORKS AND LEARNING SYSTEMS, and the International Journal of Robotics and Automation. He is currently an associate editor of the IEEE TRANSACTION ON CIRCUIT AND SYSTEMS FOR VIDEO TECHNOLOGY, and the IEEE TRANSACTION ON CYBERNETICS.

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Redundancy in Deep Neural Networks

Prof. Gao Huang, Tsinghua University

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 23 November 2018 (Friday)
Time : 4.45 PM - 5.30 PM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

As one of the most important tools in artificial intelligence, deep learning has been widely used for computer vision, natural language processing, robotics, etc. On specific tasks, it has achieved or even surpassed human-level performance. However, the strong generalization ability of deep learning is not well understood by the community. It is not clear why the over-parameterized neural networks can still generalize well.

This talk will first demonstrate that deep networks have massive redundancy - although they are parameterized by millions of parameters, they may not use them effectively. High redundancy might be helpful in improving the generalization of deep models, but it also introduces high computational burden to real systems. This talk will introduce algorithms and architecture innovations that help us understand the redundancy in deep models, and eventually reduce unnecessary redundancy for efficient deep learning.

Speaker Biography

Gao Huang is an Assistant Professor in the Department of Automation at Tsinghua University. Previously, he was a postdoc researcher in the Department of Computer Science at Cornell University, and before joining Cornell, he did his PhD at Tsinghua University. His research interests lie in the field of machine learning, especially deep learning. He has authored more than 20 papers, which collects 3800 citations. He is a recipient of the CAA Doctoral Dissertation Award, and his work on DenseNet won the Best Paper Award at CVPR 2017.

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Talk 1: Polynomial-Based Interpolation for Digital Signal Processing and Communications Applications

Talk 2: Efficient Techniques for Image Re-Sampling

Prof. Tapio Saramaki, Tampere University of Technology

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 29 November 2018 (Thursday)
Time : 3.30 PM - 5.00 PM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

There are several digital signal processing and telecommunication applications where there is a need to evaluate the sample values of a discrete-time signal at arbitrary points between the existing samples. This talk reviews computationally efficient techniques to perform such an interpolation process. The proposed techniques are based on digitally mimicking a hybrid analog/digital system. In this system, a continuous-time signal is generated by using the ideal digital-to-analog converter followed by a reconstruction filter. The samples at the desired time instants are then obtained by re-sampling the reconstructed continuous-time signal at these time instants. The reconstruction filter is designed to be piecewise polynomial in order to implement digitally the overall system using the computationally efficient Farrow structure. The proposed generalized technique allows us to modify the original Farrow structure such that the impulse responses of the fixed sub-filters are either symmetric or anti-symmetric, thereby reducing the required number of multipliers by a factor of two.

Several examples are included illustrating the usefulness of the proposed approach in several practical signal processing applications. The main advantage of this synthesis technique is that the interpolation problem can be directly considered in the frequency domain unlike in the time-domain interpolation techniques such as the Lagrange or B-spline interpolation. Five applications are considered. These include up-sampling between arbitrary sampling rates, down-sampling between arbitrary sampling rates, design of digital filters with an adjustable fractional delay and a symbol time adjustment in all-digital receivers as well as continuous-time signal processing based on the use of a proper polynomial-based interpolation and the equivalent discrete-time sequence carrying all the information about the continuous-time signal at hand. Furthermore, generalizations of the modified Farrow structure are introduced, making the resulting structure more suitable and computationally more efficient for each application under consideration.

Speaker Biography

Tapio Saramaki was born in Orivesi, Finland, on June 12, 1953. He has received the Diploma Engineer (with honors) and Doctor of Technology (with honors) degrees in electrical engineering from the Tampere University of Technology (TUT), Tampere, Finland, in 1978 and 1981, respectively. Since 1977, he has held various research and teaching positions at TUT. He was a Professor of Digital Signal Processing and a Docent (Adjunct Professor) of Communications until becoming an Emeritus Professor in 2016.

Dr. Saramaki is also a Co-Founder and a System-Level Designer of VLSI Solution, Finland, specializing in efficient VLSI implementations of both analog and digital signal processing algorithms for various applications. His research interests are in digital signal processing, especially in filter and filter bank design, efficient VLSI implementations of DSP algorithms, and communications application as well as approximation and optimization theories. He has contributed to more than 300 international journals and conference articles as well as more than 10 international book chapters. He holds three worldwide used patents.

Dr. Saramaki has paid numerous research visits to many international universities. The countries include Argentina, Brazil, Canada, China, India, Norway, Mexico, Singapore, and USA. He is the Fellow of IEEE and the Russian A. S. Popov Society for Radio-Engineering, Electronics, and Communications. He was a recipient of the 1987 and 2007 IEEE Circuits and Systems Society’s Guillemin-Cauer Awards as well as two other best paper awards. He is a founding member of the Median-Free Group International.

Dr. Saramaki has been actively taking part in many duties in the IEEE Circuits and Systems Society’s DSP Committee by being a Chairman (2002-2004), a Distinguished Lecturer (2002-2003), and a Track or a Co-Track Chair for many ISCAS symposiums (2003-2005 and 2011-2019). Furthermore, he has been on the technical committee of several international conferences including, among others, DSP, DSPA, EUSIPCO, ECCTD, IASTED, ICECS, ISPA, and NORCAS.

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Almost Tight Biorthogonal Wavelet Filters: Design and Efficient Implementation

Prof. David B. H. Tay, Deakin University

Organized by IEEE Circuits and Systems Singapore Chapter & IEEE Robotics and Automation Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 26 December 2018 (Wednesday)
Time : 2.30 PM - 3.30 PM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

A new class of filter banks, that have structural perfect reconstruction, and its design is presented here. The filters are defined by four halfband filters and are constructed using the lifting scheme. The filter banks here is a generalization of the triplet halfband filter banks proposed by Ansari et. al. Filters that have linear phase response (symmetric coefficients) and are also virtually energy preserving can be constructed using the class of structure proposed. It is also shown how these filter can be implemented efficiently in digital hardware using simple register shifts and adders. A technique to construct biorthogonal filters with rational coefficients is presented where the perfect reconstruction and the no-dc-leakage properties are preserved despite coefficient quantization.

Speaker Biography

David B. H. Tay received the B.Eng. degree in electrical and electronic and the B.Sc. degree in mathematics from the University of Melbourne, Melbourne, VIC, Australia, and the Ph.D. degree in signal processing from Cambridge University, Cambridge, U.K. He was a Lecturer and then an Assistant Professor in the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, from 1995 to 1999. From July 1999 to July 2017, he was in the Department of Engineering, LaTrobe University, first as a Lecturer and subsequently as an Associate Professor. He is currently a Senior Lecturer in Mathematics in the School of Information Technology, Deakin University, Geelong, VIC, Australia. His main research interests include the area of graph signal processing, wavelets, and filter banks, and also has interest in the area of biomedical engineering. He is currently an Associate Editor of the Journal of the Franklin Institute. He is a member of the DSP Technical Committee in the IEEE Circuits and Systems Society.

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