Continuing EE Education program for CEU credits

 

Due to the high level of interest and the tremendous knowledge and experience of the speaker, Dan Smith, the Baltimore Section of the IEEE decided to extend the successful PCB course from November 21, 2009 by including three more sessions offering related up-to-date material. We hope that many EE engineers in the Baltimore region who deal with printed circuit boards will take advantage of this excellent course (free of charge):

 

A PROGRAM of ADVANCED PRINTED CIRCUIT BOARD DESIGN:

PCB DESIGN FUNDAMENTALS USING HDI (High Density Interconnect)

 

Click here for some pictures from these courses

 

Abstract:

DESCRIPTION: Although designing with HDI (High Density Interconnect) technology has been possible in the PCB industry for over 25 years, only a limited number of US companies and PCB Designers have actually used HDI microvias in their designs. This three presentation series will provide essential knowledge of the PCB Design Process, focusing on the how and when using HDI design methodologies are both practical and financially necessary. Several PCB design process equations (i.e. predictive analysis, object spacing, etc…) will be introduced and used throughout these presentations, so attendees will be required to bring a calculator (must have ln key).

 

Presentation I – Creating a HDI Design       (Jan 9, 2010, at the National Electronics Museum - NEM)

This first presentation showed the participants all of the steps required when creating a design with HDI methodologies.

Content:

Predictive Analysis Equations: Should this board be routed with HDI (or not)?

Stackup: Number of Signal Layers Required Equations

Why you should create three routing strategies at the start of the design

Predictive Analysis Equations for creating BGA fanout

Creating Channels and Boulevards to Increase Routing Density

General Fanout Methodologies and Exceptions

Interactive Autorouting Strategy

 

 

Please note that we are changing the order of the two remaining presentations in this series:

Presentation II – Testing, Documenting, Retrofitting, and Other Valuable HDI Topics   (Feb 27, 2010, at the National Electronics Museum - NEM)

This second presentation addresses the remaining topics that will complete the perspective of the HDI design methodology. Attendees will learn about a variety of testing standards, how to properly document a HDI design, how to retrofit a TH (through-hole) design into a HDI design, and finally, a look at some next generation HDI inventions that are on the horizon.

 

Content:

The pros and cons of testing a HDI Design

Documentation – what you don’t state in your notes can cost you $$

Process steps when retrofitting a TH design with HDI technology

Design methodologies from thinking “outside of the box”

 

 

Presentation III – Signal Integrity and Power Integrity Performance Using HDI (March 27, 2010 – at Mentor Graphics Corporation)

    This hands-on workshop will be held at Mentor Graphics Corporation,  5950 Symphony Woods Road,  Suite 502,  Columbia, MD 21044

    Time: 9 am – 1 pm

 

High Density Interconnects (HDI) and microvias have benefits for more than just High-density and Fine Pitch BGAs. The High-frequency performance of HDI is superior to through-holes (TH) because of its lower inductance and capacitance and elimination of stubs.

This third presentation highlights the electrical performance benefits of HDI-microvias for not only improvements in signal integrity but reduction in power-supply impedance, resonances, current-density, decoupling capacitors and noise (power integrity). EMI/RFI improvements are also documented in examples for OEM tests.

 

Content:

HDI Signal Integrity Benefits: Circuit Noise Management

HDI Power Integrity Benefits: Power Distribution Network (PDN)

HDI Circuit Card Assembly Benefits: Eliminate 90% of Decoupling Capacitors

HDI Circuit Card Performance Benefits: Reduce EMI/RFI

 

 

Speaker’s bio:

DAN SMITH has been involved in all aspects of the PCB design process for over 30 years (Concept through Manufacturing), and over 24 years experience using a variety of EDA tools to design PCBs, Flex, Thick film and ICs. He has worked as a librarian, designer, and programmer at Motorola, US Robotics, and Shure Brothers. Smith is the author of several US software patents that have reduced design process bottlenecks. He has taught internationally, and has co-written training materials, industry articles, and several internal company and IPC standards. He is a member of IPC and the IEEE.

 

Additional info:

The courses are free to IEEE members. Non-members will also be considered, subjects to available slots. Course participants are eligible for CEU credits from IEEE.

Course applicants please contact Dr. Boris Gramatikov, Director for Continuing EE Education for the Baltimore Section, at:  bgramat@jhmi.edu   Please include your IEEE member number and the name of your current employer in your requests for registration. Please check also the CEEE/CEU web site at:

    https://ewh.ieee.org/r2/baltimore/continuing_education/CEEE.htm       and

    https://ewh.ieee.org/r2/baltimore/continuing_education/CEEE_Events_Baltimore_Section.htm

 

Click here for some pictures from these courses