Presentation: December 1, 2010
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David M Fried, IBM, East Fishkill, NY
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Challenges Facing 32nm and 22nm IC Technologies
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Abstract
As the semiconductor-industry continues the march to increased circuit
density and higher performance, the challenges of nanoscale CMOS
have increased exponentially. Limitations loom in the realms of
physics, reliability, manufacturing and finance. However, development
teams continue to work around these limitations and produce generation
after generation of new silicon CMOS every few years. After a brief
review of recent developments in semiconductor process and device
design, the challenges facing 32nm and 22nm technologies will be
presented in detail. Several technological innovations are being
put in place for these technologies across the industry, in many
cases creating technical divides in the marketplace. The future
of chip technology includes a dizzying array of options, all with
technical and financial implications. Several of these future
technology options will be presented.
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