Presentation by Dr. TR Viswanathan, Research Professor, University of Texas, Austin Aug 27, 2014



Analog Design Issues at 65nm and Below

Abstract

CMOS Technology nodes below 65 nm are super-fast. Analog designers face several issues. Some of these need some old fashioned simple thinking. The target systems that use these high-speed circuits are for handling data streams that feed optical communication links. Supply voltages for these technologies fall below 1V. Gain obtainable per stage is in single digits. Process variations are large. This means that we have to abandon some cherished ideas like operational amplifiers and affluent negative feedback

In spite of the high speeds achievable in digital circuits, liberal use of DSP becomes power hungry. This forces us to minimize DSP as much as possible and resort to analog techniques wherever possible. The saving grace is that the resolution required for data conversion is only 6 bits.

So the natural questions are: what can be done in the analog domain? How do we build 6-bit ADC and DAC? We will discuss some approaches to design these keeping the power dissipation at reasonable levels.

Biography

Dr. T. R. Viswanathan is a Research Professor in the Department of Electrical and Computer Engineering at The University of Texas at Austin and holds the Silicon Laboratories Endowed Chair in Electrical Engineering. Dr. T. R. Viswanathan was a Partner at Artiman Ventures. He spent 15 years in research and development, product design, manufacturing, and management in the industry. Dr. Viswanathan retired as a Director of Research and Development from Texas Instruments Incorporated and built and managed a world class research and development organization for advanced (high risk) product development in the most advanced technologies of TI, generated intellectual property, and managed the collaboration of TI with the research activities at the top universities such as MIT, Columbia, University of Pennsylvania, Carnegie-Mellon, Stanford, U.C. Berkeley, U.C. Davis as well as organizations such as SRC and Sematech. Prior to that, he was a Technical Manager at AT&T Bell laboratories for ten years where his responsibilities were the design and manufacturing of products for data and voice communication systems. Prior to that, Dr. Viswanathan spent 20 years in teaching, research, and academic administration in the following educational institutions in the United States, Canada, and India. He was Adjunct Professor at Moore School of the University of Pennsylvania and Professor of Electrical Engineering, University of Waterloo, Ontario, Canada, University of Michigan, Dearborn, Michigan, Carnegie-Mellon University, Pittsburgh, Pennsylvania. In India, Dr. Viswanathan was a Professor of Electrical Engineering, Head, Computer Center, and Dean at the Indian Institute of Technology, Kanpur, India. He taught courses in Electrical and Computer Engineering and supervised the thesis work of many graduate students in the area of Analog Integrated Circuit Design.

Dr. Viswanathan has also consulted for the governments and industries in India, Canada, and U.S.A. He is a Fellow of IEEE and was a Member of the Solid State Circuits Society and the Circuits and Systems Society. He received the IEEE CAS Darlington Award, the IEEE Third Millennium Medal, and the Jack Kilby Award. Dr. Viswanathan has co-authored over 45 journal papers, one textbook and 23 U.S. Patents. He won the Jagirdar of Arni gold medal of the University for being the best Physics student of the year. Dr. Viswanathan holds a B.Sc in Physics from the University of Madras in 1956 and graduated in Electrical Communications Engineering from the Indian Institute of Science, Bangalore, in 1959. He received an M.Sc. in 1961 and a Ph.D. degree in Electrical Engineering in 1964 from the University of Saskatchewan, Saskatoon, Canada.

Invitation