Towards Ultra Wide Tuning Range and Low Phase Noise mm-Wave VCOs: A Negative Capacitance and BiCMOS Perspective
Prof. Waleed Khalil, Ohio State University, Columbus, OH
Sponsored by Mid-Atlantic Microwave
Date: Monday, April 1, 2013
Time: 5:30 Reception, Dinner (Optional) 6:00 pm, Lecture 7:00
Place: Mitre Building 2
All IEEE members and guests are welcome to attend.
Cost: Lecture and reception free, optional Dinner $10
Please RSVP (Dinner only) to Roger Kaul, 301-394-3568 firstname.lastname@example.org by March 27th
The ever-increasing demand for data rates/range in modern communication/radar systems coupled with the push towards mm-wave links, has dictated the need for wide tuning range voltage controlled oscillators (VCOs). Traditionally, mm-wave VCOs have been implemented in III-V technologies benefiting from fast device speed and low parasitic capacitance. However, they suffer from the main drawback of high manufacturing cost and limited level of integration.
With lower cost, high transistor fT, ease of integration and power-savings, silicon-based VCOs are very attractive for large-volume applications. Unfortunately, the benefits in digital CMOS technology are not perpetuated easily in designing mm-wave VCOs. The RF components, including inductors and capacitors, suffer from low Q-factor. Therefore, large transconductance (gm) transistors are required to compensate for high losses, leading to pronounced capacitive loading effects that sharply reduce the VCO tuning range. Moreover, transistors with large gm generate high switching noise in mm-wave, which significantly degrade the phase noise of the VCO.
In light of these challenges, this talk will present our current research work to build robust Si-based RF circuits with focus on ultra wide tuning-range and low phase noise VCOs.
Dr. Khalil received his B.S.E.E. and M.S.E.E degrees from the University of Minnesota in 1992 and 1993, respectively. In 2008, he received his PhD degree in Electrical Engineering from Arizona State University. He is currently serving as an Assistant Professor at the ECE department and the ElectroScience Lab, The Ohio State University.
He conducts research in digital intensive RF and mm-wave circuits and systems, high performance clocking circuits, GHz A/D and D/A circuits. Prior to joining OSU, Prof. Khalil spent 16 years at Intel Corporation where he held various technical leadership positions in wireless and wireline communication groups. While at Intel, he was appointed the lead engineer at the advanced wireless communications group, where he played an instrumental role in the development of the industry’s first Analog Front-end IC for third generation radios (3G). He established Intel’s first analog device modeling methodology for mixed signal circuit design and also contributed to the development of Intel’s first RF process technology. He later co-founded an internal startup group to develop Intel’s first RF front-end IC, as a principle leader of the radio transmitter chain. During his work at Intel, he received the prestigious Intel Quality Award.
He authored and co-authored 10 issued and several other pending patents, over 40 journal and conference papers and two book chapters on PLL design and advances in digital to analog converters. He serves in the steering committee for the RFIC Symposium and the technical program committee for the Compound Semiconductor IC Symposium (CSICS).