**************************************************************************************************** Abstract Quality & Reliability Issues with Counterfeit ICs The semiconductor industry has made tremendous progress over the past decades in manufacturing ICs with very high levels of quality and reliability. As with other semiconductor suppliers, Analog Devices, Inc. (ADI) sells these ICs both directly and through authorized distributors. When customers buy ICs exclusively through authorized channels, they can be assured of receiving legitimate product that is backed by after-sales support and a full warranty in the rare event of failure. Unfortunately, customers sometimes turn to non-authorized sources when buying ICs. The reasons for doing so vary. In some cases, these non-authorized sources misleadingly represent themselves as authorized distributors. In other cases, non-authorized sources may be selling ICs that are available for immediate delivery at well below the current Average Selling Prices offered by semiconductor companies and their authorized distributors. These ICs are generally sold with no after-sales support or warranty from the associated semiconductor company. When using non-authorized sources for components, the buyer takes a risk that the components will not work as received. Depending on the rationale for the purchase, the buyer may feel comfortable taking this risk, especially if incoming inspection / testing procedures are in place. However, no matter how comprehensive these procedures are, the incoming analysis cannot adequately identify reliability risks that can potentially far outweigh any perceived benefits of buying from non-authorized sources. ADI's analysis has shown that ICs bought from non-authorized sources may be counterfeits or otherwise inferior products that may initially work but fail in the field. More specifically, many ICs available from non-authorized sources are used ICs that were pulled from old Printed Circuit Boards (PCBs) and re-marked as if they were new. Due to the uncontrolled nature of this "recycling," IC packages may be subtly damaged; die may develop micro-cracks; parts may be zapped by ESD; moisture-sensitive packages may "popcorn" during PCB assembly; and chemicals used by counterfeiters to re-mark ICs and clean the pins may slowly work into the packages, eventually causing corrosion failures. Each of these mechanisms can take time to manifest as failures. In addition, some products with counterfeit package markings indicating they are from ADI actually contain non-ADI die that may have similar but not identical electrical performance to the corresponding legitimate ADI products. Thus, the result of what was perceived to be a low-risk purchase of ICs from non-authorized sources can be large warranty and/or monetary claims by end-customers due to failures in the field after months or years of use. *********************************************************************************************************** Abstract Real-World Charged Board Event (CBE) ESD Failures The Human Body Model is a mature, well-understood ESD model for simulating charge transfer from a person's finger to an electronic component. However, recent industry data from Analog Devices, Inc. (ADI) and other companies indicates the HBM rarely simulates real-world ESD failures. More specifically, most component manufacturers and users have effective controls against HBM ESD events, and the latest-generation package styles such as mBGAs, SOTs, SC70s, & CSPs with mm-range dimensions are often effectively too small for people to handle with fingers. Even in cases of relatively large components, most high-volume component and board manufacturing uses automated equipment, so humans rarely touch the components. ADI's Failure Analysis (FA) data has shown that a significant percentage of real-world IC ESD failures occur at the Printed Circuit Board (PCB) or system level, as opposed to just at the component level. For >15 years, ADI has used Charged Device Model (CDM) test methods to successfully replicate in-house and customer IC failures at the component level. The CDM simulates the damage induced when a metal pin or solder ball on a charged IC package is almost instantaneously discharged via contact with a metallic object at ground potential. This presentation provides two case studies on ICs that are robust to ESD at the component-level but were nonetheless damaged by ESD at the board-level. The damage was simulated via Charged Board Event (CBE) testing using a conventional CDM test system. A CBE discharge is very similar to a CDM discharge, but in this case the charged object is a PCB that is discharged when an edge connector pin or some other metal portion of the board contacts a metallic object at ground potential. For a given charge voltage, the CBE discharge waveforms had higher peak currents than the corresponding CDM discharge waveforms. Thus, the CBE damage was more severe than the CDM damage. In some cases, the CBE damage was so severe that it could easily have been mistaken for Electrical Overstress (EOS) damage. The susceptibility of a given IC to CBE damage is a complex function of variables including the IC on-chip protection network; the IC package design; the size of the power planes on the PCB; the number of power supply pins on the IC tied to the power planes; the distance between the IC and the board discharge point; and the board protection circuitry design. This work documents the physical failure analysis results of real-world CBE ESD failures, along with the simulation results from a CBE test method that was successfully used to replicate these failures. Using two case studies, the damage seen on real-world CBE failures is detailed and a board-level CBE test method used to replicate the damage seen on these failures is described. Corrective actions implemented to eliminate these CBE failures are later discussed. Finally, the relationship between the PCB design and the corresponding IC CBE robustness is explored and guidelines are provided on how to minimize the likelihood of real-world CBE damage. ********************************************************************************************************** Biography: Andrew Olney Andrew Olney is the Director of Reliability, Product Analysis, Calibration & ESD at Analog Devices, Inc. in Wilmington, Massachusetts. Andrew received a BS degree from Lehigh University (1985) and an MS degree from Boston University (1990), both in Electrical Engineering. From 1985 to 1988, he was an engineer in the Electron Microscope and Surface Analysis Laboratory at Raytheon Company. From 1988 to 1990, he managed the Failure Analysis (FA) Laboratory at Sprague Semiconductor Company. He joined Analog Devices, Inc. (ADI) in 1990 as a Reliability Engineer, qualifying new packages, manufacturing processes, and products. In the mid 1990s, Andrew led the ADI Electrostatic Discharge (ESD) Group tasked with developing ESD design and test methodologies to assure new products meet customer ESD robustness requirements. Andrew has published several papers and holds several patents related to ESD testing and on-chip protection. From 1998-2006, Andrew was the Quality Manager for all ICs developed in Wilmington, MA; Norwood, MA; and Greensboro, NC. In this position, he managed a department responsible for Quality Systems, Failure Analysis, Reliability, and Customer Advocacy. In his current role, Andrew is responsible for managing ADI's worldwide Reliability, Product Analysis, Calibration, and ESD labs and associated engineering organizations. He also represents ADI on the Semiconductor Industry Association (SIA) Anti-Counterfeiting Task Force. Regards, Slavica Malobabic, University of Central Florida, PhD student, IEEE EDS Chapter Chair, 321 609 1851 smalobabic@ieee.org