ABSTRACT

ESD (Electro-Static Discharge) induced failure becomes a major IC reliability problem as semiconductor IC technologies migrate into the VDSM (very-deep-sub-micron) ULSI (ultra large scale integration) regime. On-chip ESD protection circuitry is required to protect IC chips against ESD damages. Particularly, ESD design for mixed-signal & RF IC is a new challenge to IC designers. Currently, trial-and-error approaches still dominate in ESD design practices, largely due to the lack of predictive ESD simulation capacity. This talk will outline the principles of ESD protection circuit design and discuss a new mixed-mode ESD simulation-design methodology developed at the Integrated Electronics Laboratory, Illinois Institute of Technology. Practical ESD protection circuit design examples will be provided. This lecture aims to assist working IC circuit designers in dealing with real-world on-chip ESD protection circuit design problems. Those who are interested in more details are referred to a short course, ECE723 Advanced ESD Protection Design For Integrated Circuits, offered by the Department of Electrical and Computer Engineering at the Illinois Institute of Technology.

REFERENCE BOOK

ON-CHIP ESD PROTECTION FOR INTEGRATED CIRCUITS: An IC Design Perspective, by Albert Wang, Kluwer Academic Publishers, 2002, ISBN: 0-7923-7647-1.

BIOGRAPHY

Mr. Albert Wang received his PhD degree in Electrical Engineering from the State University of New York at Buffalo in 1995. After working for the National Semiconductor Corporation, Santa Clara, CA, as a Staff R&D Engineer, he joined the Faculty of the Department of Electrical and Computer Engineering, the Illinois Institute of Technology in 1998, where he directs the Integrated Electronics Laboratory. His research interests center on analog, mixed-signal, RF and SoC ICs, advanced on-chip ESD protection circuits, IC CAD and advanced semiconductor devices, etc. His academic records include more than fifty papers, several U.S. patents and one book, “On-Chip ESD Protection for Integrated Circuits” (by Kluwer Academic Publishers, 2002, ISBN: 0-7923-7647-1). Dr. Wang is a recipient of the NSF CAREER Award of 2002. He is a Senior Member of IEEE, an IEEE Solid-State Circuit Society Distinguished Lecturer and an IEEE Electron Device Society AdCom member. He serves on the Technical Program Committee of IEEE Custom Integrated Circuits Conference (CICC) and other technical conferences. He is an active consultant to the IC industry.

Place:
Motorola
Schaumburg, Illinois


Time:
Social (Free Sandwiches, Snacks, and Beverages) …. 7:00 PM
Presentation ………………........................................ 7:30 PM