The Analog is the monthly newsletter of the Central Texas Section of the Institute of Electrical and Electronic Engineers, Inc. New issues are published around the first of each month. The deadline for inclusion of material is the 26th of the month. Send submissions, comments, questions to John Purvis, Editor, john.purvis@ieee.org. Archives of The Analog can be found on the CTS web site here.
You can always check on all of the upcoming Central Texas Section activities here
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Central Texas Section in Social Media
New Central Texas Section OfficersThe period for adding petition candidates for the elected Central Texas Section officers ended on October 15th, with no petition candidates. In anticipation of this outcome, the CTS Executive Committee voted election by acclamation for uncontested candidates in its August 29th meeting. From the Central Texas Section Chair
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IEEEXplore
- full text access to IEEE Publications The Spectrum Online - The Magazine for Technology Insiders IEEE: The Bridge - IEEE-Eta Kappa Nu (IEEE-HKN)'s signature publication, an interactive digital magazine published three times a year. IEEE Member Newsletter https://theinstitute.ieee.org |
See also https://www.wikicfp.com - A place to organize and share Calls for Papers.
Call-For-Poster: 2015 Workshop on Hardware and Algorithms for Learning On-a-chip (HALO)November 6-8, 2015: Barnes & Noble to Host 650 Mini Maker Faires
Collocated with IEEE/ACM ICCAD, November 5th, 2015, Austin, TX, U.S.A.
https://nimo.asu.edu/halo
Background
Machine learning algorithms have made significant progresses, achieving the accuracy close to, or even better than human-level perception in various tasks. Yet hardware implementation of the massively parallel and/or deep learning algorithms is still too expensive in both computation and power consumption. There is a timely need to map the latest learning algorithms to application-specific hardware (e.g., FPGA, ASIC, etc.), in order to achieve orders of magnitude improvement in performance, energy efficiency and compactness. Recent progress in computational neurosciences and nanoelectronic technology, such as resistive memory devices, will further help shed light on future hardware-software platforms for learning on-a-chip.
The workshop organizers strongly encourage the submission of early results in the related topics. The submissions will be evaluated by the Technical Program Committee. The author(s) of the accepted submissions are expected to present the results in the format of posters at the workshop. Travel support will be provided to students or post-doctoral researchers, at the level of $500 for each domestic team and $1000 for each international team.
Key Topics
- Synaptic plasticity and neuron motifs of learning dynamics
- Computation models of cortical activities
- Sparse learning, feature extraction and personalization
- Deep learning with high speed and high power efficiency
- Hardware acceleration for machine learning and computer vision
- Hardware emulation of brain
- Nanoelectronic devices and architectures for neuro-computing
- Applications of learning on a smart mobile platform
Abstract Format
One page maximum in US Letter or A4 format. Once accepted, the authors are required to give a short oral introduction as well as poster presentation.
Travel Support
Travel support for a total of $15,000 is provided to accepted abstracts. The amount for each team will be at $500 (US) or $1000 (international).
Timeline
Submission
- Submission Deadline: September 30th, 2015
- Notification of Acceptance: October 3rd, 2015
- Workshop Date: November 5th, 2015
Please send the abstract in PDF format to yu.cao@asu.edu, with subject “HALO 2015 poster submission”
Contact
Professor Yu Cao, School of ECEE, Arizona State University, yu.cao@asu.edu
Calling all Makers: Here’s your chance to “think globally, act locally” and support Maker Faire — and your local bookstore, too.
Make: has partnered with our friends at Barnes & Noble to bring Making to 650 domestic stores for the weekend of November 6 to 8, as part of the Barnes & Noble Mini Maker Faire program.
Read more . . .
AT&T Executive Education and Conference Center. Register here
This will be the biggest Data Day ever.
https://datadaytexas.com
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While the express goal of this website is to recruit and retain women students in sciences and mathematics at Eastern Illinois University, there is plenty of good information on the site for the rest of us. Readers may like to start with Further Reading, where they can link to media coverage of women in science from around the web. From there, they may select Biographies of Women in Science, where they can access dozens of biographies of women who have made contributions to fields as diverse as chemistry, primatology, biophysics, and astronomy. In addition, the site features links to half a dozen other websites on the topic, from the Smithsonian's photo portraits of women scientists to the San Diego Supercomputer Center's coverage of women scientists from around the world.
STEMconnector is both a resource and a service that is designed “to link those advocating science, technology, engineering, and math (STEM) education across disciplines and distances.” It seeks to connect diverse educators, professionals, and government officials together based on a love of applied science. The STEMblog, a project of STEMconnector, is updated regularly and focuses its energies on the relationship between business and STEM subjects. Recent articles, for example, have alerted readers to corporate-sponsored prizes for high school science teachers, a recognition of National Engineers Week, and the math behind a new Android app. For readers who are looking to make connections between STEM subjects and industry partners, the STEMblog is an informative site to check back on regularly.
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Trustworthy Hardware |
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Ramesh Karri Ramesh Karri is a Professor of Electrical and Computer Engineering at Polytechnic Institute of New York University. He has a Ph.D. in Computer Science and Engineering, from the University of California at San Diego. His research interests include trustworthy ICs and processors; High assurance nanoscale architectures and systems; VLSI Design for Test and Trust; Interaction between security and reliability. He has over 150 journal and conference publications in these areas. He has written two invited articles in IEEE Computer on Trustworthy Hardware, an invited article on Digital Logic Design using Memristors in Proceedings of IEEE and an Invited article in IEEE Computer on Reliable Nanoscale Systems. He was the recipient of the Humboldt Fellowship and the National Science Foundation CAREER Award. He is the area director for cyber security of the NY State Center for Advanced Telecommunications Technologies at NYU-Poly; Hardware security lead of the Center for research in interdisciplinary studies in security and privacy -CRISSP (https://crissp.poly.edu/), co-founder of the Trust-Hub (https://trust-hub.org/) and organizes the annual red team blue team event at NYU, the Embedded Systems Challenge (https://www.poly.edu/csaw2012/csaw-embedded). He served on the 2006 DARPA ISAT study on "Trust in Integrated Circuits". He cofounded and served as the chair of the IEEE Computer Society Technical Committee on Nanoscale architectures. He is a cofounder and steering committee member of the IEEE/ACM Symposium on Nanoscale Architectures (NANOARCH). He is the Program Chair (2012) and General Chair (2013) of IEEE Symposium on Hardware Oriented Security and Trust (HOST). He is the Program Co-Chair (2012) and General Co-Chair (2013) of IEEE Symposium on Defect and Fault Tolerant Nano VLSI Systems. He is the General Chair of the 2013 NANOARCH. He serves on several program committees including DAC 2013, ICCD 2012-2013, VTS 2014 and VLSI-SoC 2013. He is an Associate Editor of IEEE Transactions on Information Forensics and Security and an Associate Editor of ACM Journal on Emerging Computing Technologies. He is a Distinguished Lecturer of IEEE Computer Society for 2013-2105. He has presented invited tutorials on various aspects of Trustworthy Hardware including at 2012 VLSI Test Symposium, 2012 International Conference on Computer Design, 2013 IEEE North Atlantic Test Workshop, 2013 Design Automation and Test in Europe. |
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Abstract |
Hardware security and trust is an important
design objective similar to power, performance,
reliability and testability. I will highlight why
hardware security and trust are important
objectives from the economics, security, and
safety perspectives. Important learning outcomes
of this talk include (i) understanding simple
gotchas when traditional DFT, test, and validation
techniques are used (scan chains, JTAG, SoC test,
assertion based validation), (ii) understand how
traditional DFT, test and validation techniques
can be used to improve hardware security and trust
and finally (iii) understand "Design for Trust"
approaches that can provide testability without
compromising security and trust. |
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Date/Time |
November 4th 6:30PM to 8:30PM |
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Cost |
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Reservations |
https://meetings.vtools.ieee.org/meeting_view/list_meeting/36520 |
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Location |
THE ADVISORY BOARD - BUILDING 7, Suite 100 12357-C Riata Trace Pkwy Austin, Texas 78727 |
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Notes |
Joint meeting with CEDA, ComSoc Austin, CAS & SSC and Austin Computer Society |
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Topic/Title |
The New Horizons Mission to Pluto |
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Scott Weidner Mr. Weidner has over 32 years’ experience in research and development engineering. For the last 20 years, he has designed, built, tested, and delivered scientific instruments for numerous spaceflight missions. He has demonstrated the ability to lead international teams through the development of new technology for challenging environments that perform successfully on-orbit and lead to significant scientific discovery. Currently, Mr. Weidner serves as the Project Manager for the Integrated Science Investigation of the Sun (ISIS) on Solar Probe Plus (SPP) mission in which he manages instrument development effort occurring in six different US institutions. The SPP spacecraft will fly within nine radii of the surface of the Sun to discover the fundamental links between the dynamic solar atmosphere and the solar wind, the mechanisms that heat the Sun’s corona and accelerate the solar wind, and the processes that energize and transport solar energetic particles. Mr. Weidner is also the SwRI lead for the Dual Ion Spectrometer which is part of the Fast Plasma Investigation for the Magnetospheric Multiscale mission (MMS). The MMS mission uses four identical spacecraft, orbiting the Earth in close formation, to make three-dimensional measurements of magnetospheric boundary regions and examine the process of magnetic reconnection. The DIS instruments were developed in Japan by ISAS and the Meisei Electric Company. The detectors for the instrument were supplied from France by IRAP. Calibration was performed at NASA’s Marshall Space Flight Center. The multi-national technical effort required careful management and communication for success. Mr. Weidner serves as the Instrument Manager for the Jovian Auroral Distributions Experiment (JADE) on the Juno mission to Jupiter. JADE is a suite of electron and ion sensors that measures the full pitch angle distribution of electrons and the three-dimensional velocity-space distribution of ions in Jupiter’s magnetosphere. He led a large team of 35 scientists, engineers, and technicians who designed and built this instrument. He was responsible for budget, schedule, technical leadership, and mentoring of younger staff members on this project. He coordinated the efforts of foreign and domestic subcontractors, worked with the spacecraft vendor to solve accommodation issues, and was the primary JADE point-of-contact for the Juno Payload Office at NASA’s Jet Propulsion Lab. Mr. Weidner led the development of the HI Sensor for the Interstellar Boundary Explorer (IBEX) mission. The IBEX payload contains two Energetic Neutral Atom cameras which has made the first global image of the interaction between our sun’s heliosphere and the local interstellar medium. As Lead Engineer for the Solar Wind Around Pluto (SWAP) Instrument that is flying on the New Horizons mission to Pluto, Mr. Weidner led a team of engineers in the development of the electro-optics, detectors, high voltage power supplies, mechanical packaging, and flight software. He designed the analog front-end electronics as well as the control board electronics and its FPGA. On NASA’s Deep Impact mission to the comet Tempel I, Mr. Weidner designed the Attitude Propulsion Interface Board (APIB) that was redundantly cross-strapped on the flyby-spacecraft and monitored coarse sun sensors, drove reaction wheels, measured tank pressure, controlled hydrazine latch valves, and included a unique thruster valve drive circuit that provided step-back and hold capability to minimize power during the battery-only long burn on the impactor-spacecraft. Mr. Weidner has worked on several other spaceflight instruments. He designed the front-end electronics for the Two Wide-angle Imaging Neutral-atom Spectrometers (TWINS). This included the imaging anode, charge amplifiers, time-of-flight electronics, pulse height analysis electronics, and the digital control board and FPGA which processes events in real-time and buffers them for the CPU. He designed the analog electronics for the Ion Electron Spectrometer (IES) instrument on the European Space Agency’s Rosetta Mission, which is in orbit around the comet 67P/Churyumov-Gerasimenko. He served as the Lead Electrical Engineer for the Medium Energy Neutral Atom (MENA) imager on NASA’s Imager from Magnetopause to Aurora for Global Exploration (IMAGE) mission. Previously at Southwest Research Institute, Mr. Weidner has been responsible for designing electronic systems for a wide variety of instrumentation projects. He has designed, delivered, and supported ultrasonic in-service inspection equipment around the world for the nuclear power industry. Mr. Weidner designed the digital circuitry for the AUT-EDASTM channel card that integrates an analog ultrasonic instrument with digital processing and control circuits on a VME bus card. He also designed a waveform averager card that averages ultrasonic signals in real time using high-speed ECL circuits, yielding an increased signal-to-noise ratio. |
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The New Horizons Mission to Pluto is humanity's
first visit to the last kind of planet. Between
Pioneer 10 & 11, and Voyager 1 & 2, we've
flown by all of the rocky planets (Mercury, Venus,
Earth, and Mars) and all of the gas giants
(Jupiter, Saturn, Uranus, and Neptune). Pluto
belongs to a whole other class of planets, the Ice
Dwarf Planets, that are part of the Kuiper belt
disk that surrounds our Solar System. We will
discuss the mission, the payload, and the exciting
results from the July 2015 flyby and our plans for
the future. |
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Date/Time |
November 11th from 6:30PM to 8:45PM |
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Reservations |
https://meetings.vtools.ieee.org/meeting_view/list_meeting/36118 |
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Location |
Cadence Design Systems 12515-7 Research Blvd. Conference Room #130 Austin, TX 78759 |
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Food and drinks will be provided. |
The CEDA chapter normally meet on the 3rd Thursday of every month. This meeting is open to the public and interested parties. Additional details will be posted at the website. If you have any questions about this meeting or this group, please contact zhuoli@ieee.org.
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Topic/Title |
Trustworthy Hardware |
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Speaker |
Ramesh Karri Ramesh Karri is a Professor of Electrical and Computer Engineering at Polytechnic Institute of New York University. He has a Ph.D. in Computer Science and Engineering, from the University of California at San Diego. His research interests include trustworthy ICs and processors; High assurance nanoscale architectures and systems; VLSI Design for Test and Trust; Interaction between security and reliability. He has over 150 journal and conference publications in these areas. He has written two invited articles in IEEE Computer on Trustworthy Hardware, an invited article on Digital Logic Design using Memristors in Proceedings of IEEE and an Invited article in IEEE Computer on Reliable Nanoscale Systems. He was the recipient of the Humboldt Fellowship and the National Science Foundation CAREER Award. He is the area director for cyber security of the NY State Center for Advanced Telecommunications Technologies at NYU-Poly; Hardware security lead of the Center for research in interdisciplinary studies in security and privacy -CRISSP (https://crissp.poly.edu/), co-founder of the Trust-Hub (https://trust-hub.org/) and organizes the annual red team blue team event at NYU, the Embedded Systems Challenge (https://www.poly.edu/csaw2012/csaw-embedded). He served on the 2006 DARPA ISAT study on "Trust in Integrated Circuits". He cofounded and served as the chair of the IEEE Computer Society Technical Committee on Nanoscale architectures. He is a cofounder and steering committee member of the IEEE/ACM Symposium on Nanoscale Architectures (NANOARCH). He is the Program Chair (2012) and General Chair (2013) of IEEE Symposium on Hardware Oriented Security and Trust (HOST). He is the Program Co-Chair (2012) and General Co-Chair (2013) of IEEE Symposium on Defect and Fault Tolerant Nano VLSI Systems. He is the General Chair of the 2013 NANOARCH. He serves on several program committees including DAC 2013, ICCD 2012-2013, VTS 2014 and VLSI-SoC 2013. He is an Associate Editor of IEEE Transactions on Information Forensics and Security and an Associate Editor of ACM Journal on Emerging Computing Technologies. He is a Distinguished Lecturer of IEEE Computer Society for 2013-2105. He has presented invited tutorials on various aspects of Trustworthy Hardware including at 2012 VLSI Test Symposium, 2012 International Conference on Computer Design, 2013 IEEE North Atlantic Test Workshop, 2013 Design Automation and Test in Europe. |
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Abstract |
Hardware security and trust is an important
design objective similar to power, performance,
reliability and testability. I will highlight why
hardware security and trust are important
objectives from the economics, security, and
safety perspectives. Important learning outcomes
of this talk include (i) understanding simple
gotchas when traditional DFT, test, and validation
techniques are used (scan chains, JTAG, SoC test,
assertion based validation), (ii) understand how
traditional DFT, test and validation techniques
can be used to improve hardware security and trust
and finally (iii) understand "Design for Trust"
approaches that can provide testability without
compromising security and trust. |
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Date/Time |
November 4th 6:30PM to 8:30PM |
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Cost |
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Reservations |
https://meetings.vtools.ieee.org/meeting_view/list_meeting/36520 |
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Location |
THE ADVISORY BOARD - BUILDING 7, Suite 100 12357-C Riata Trace Pkwy Austin, Texas 78727 |
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Notes |
Joint meeting with CEDA, ComSoc Austin, CAS & SSC and Austin Computer Society |
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Trustworthy Hardware |
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Ramesh Karri Ramesh Karri is a Professor of Electrical and Computer Engineering at Polytechnic Institute of New York University. He has a Ph.D. in Computer Science and Engineering, from the University of California at San Diego. His research interests include trustworthy ICs and processors; High assurance nanoscale architectures and systems; VLSI Design for Test and Trust; Interaction between security and reliability. He has over 150 journal and conference publications in these areas. He has written two invited articles in IEEE Computer on Trustworthy Hardware, an invited article on Digital Logic Design using Memristors in Proceedings of IEEE and an Invited article in IEEE Computer on Reliable Nanoscale Systems. He was the recipient of the Humboldt Fellowship and the National Science Foundation CAREER Award. He is the area director for cyber security of the NY State Center for Advanced Telecommunications Technologies at NYU-Poly; Hardware security lead of the Center for research in interdisciplinary studies in security and privacy -CRISSP (https://crissp.poly.edu/), co-founder of the Trust-Hub (https://trust-hub.org/) and organizes the annual red team blue team event at NYU, the Embedded Systems Challenge (https://www.poly.edu/csaw2012/csaw-embedded). He served on the 2006 DARPA ISAT study on "Trust in Integrated Circuits". He cofounded and served as the chair of the IEEE Computer Society Technical Committee on Nanoscale architectures. He is a cofounder and steering committee member of the IEEE/ACM Symposium on Nanoscale Architectures (NANOARCH). He is the Program Chair (2012) and General Chair (2013) of IEEE Symposium on Hardware Oriented Security and Trust (HOST). He is the Program Co-Chair (2012) and General Co-Chair (2013) of IEEE Symposium on Defect and Fault Tolerant Nano VLSI Systems. He is the General Chair of the 2013 NANOARCH. He serves on several program committees including DAC 2013, ICCD 2012-2013, VTS 2014 and VLSI-SoC 2013. He is an Associate Editor of IEEE Transactions on Information Forensics and Security and an Associate Editor of ACM Journal on Emerging Computing Technologies. He is a Distinguished Lecturer of IEEE Computer Society for 2013-2105. He has presented invited tutorials on various aspects of Trustworthy Hardware including at 2012 VLSI Test Symposium, 2012 International Conference on Computer Design, 2013 IEEE North Atlantic Test Workshop, 2013 Design Automation and Test in Europe. |
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Abstract |
Hardware security and trust is an important
design objective similar to power, performance,
reliability and testability. I will highlight why
hardware security and trust are important
objectives from the economics, security, and
safety perspectives. Important learning outcomes
of this talk include (i) understanding simple
gotchas when traditional DFT, test, and validation
techniques are used (scan chains, JTAG, SoC test,
assertion based validation), (ii) understand how
traditional DFT, test and validation techniques
can be used to improve hardware security and trust
and finally (iii) understand "Design for Trust"
approaches that can provide testability without
compromising security and trust. |
|
Date/Time |
November 4th 6:30PM to 8:30PM |
|
Cost |
|
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Reservations |
https://meetings.vtools.ieee.org/meeting_view/list_meeting/36520 |
|
Location |
THE ADVISORY BOARD - BUILDING 7, Suite 100 12357-C Riata Trace Pkwy Austin, Texas 78727 |
|
Notes |
Joint meeting with CEDA, ComSoc Austin,
CAS & SSC and Austin Computer Society |
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| Topic/Title | Internet of Things |
|---|---|
| Speaker | Fawzi Behmann of TelNet Management Consulting,
Inc. Fawzi is a visionary, thought leader, author that has been blessed with great academic and career opportunities. He holds a Bachelor of Science with honors and distinction, Masters in Computer Science and Executive MBA. All this has contributed to a solid base in science, math, logic, technology and business. This academic foundation empowered Fawzi in his career path in the area of communications and networking spanning supply-chain from service provider with Teleglobe, to equipment vendor with Nortel Networks, to semiconductor with Motorola/Freescale in Canada and USA. Since 2009, Fawzi started TelNet Management Consulting, Inc, offering consulting services to consortiums in the areas of processor technology evolution, clients for IoT, SoC Architecture solutions for key markets and IoT. Recently, Fawzi collaborated with consortiums and offered consultation and proposals for risk-based GIS in the area of public safety to Interior ministry of Ghana and Togo and Strategy and roadmap to ministry of Environment & Water at UAE. Fawzi is active in international forums and standards activities with ITU, ITRS and IEEE. He is currently the chair of IEEE COMSOC/SP Austin chapter and in 2015 was a recipient of R5 Outstanding member service award and IEEE Communications Society Chapter Achievement and Chapter of the year award across 212 chapters globally representing over 52,000 members. Finally, Fawzi is a recent co-author of a new book on the future of IoT "Collaborative Internet of Things for Future Smart Connected Life and Business " published by Wiley (June 2015) and is available on Amazon. |
| Abstract | The talk will shed light and respond to some
frequently asked questions about The Internet of
Things (IoT): Q1: Is the concept of IoT new? Q2: What are some of he key drivers influencing the advancement of IoT? Q3: What are some of the key benefits and examples of collaborative "Smart" IoT? Q4: Is it too early to talk about IoT KPI (Key Performance Indicators)? While IoT is still largely unknown amongst the general public, it is expected to make a big impact in 2015 and beyond. Estimates indicate that the number of connected devices will reach 4.9 billion this year, but not everyone is getting excited about this disruptive technology. In addition, various sources point out to 50-200 billion devices connected by 2020. This presentation will provide a quick overview on the evolution of IoT, explore future opportunities that calls for innovative approach supported by industry initiatives and standards activities. The presentation will provide a few examples addressing smart health & fitness, smart home, smart energy, smart car, smart parking, smart public safety and smart cities. |
| Date/Time | 19-November-2015 07:00PM to 09:00PM |
| Cost | |
| Reservations | https://meetings.vtools.ieee.org/m/36734 |
| Location | Richter Engineering and Mathematics Building Room Number: 107 St. Mary's University San Antonio, Texas |
| Notes |
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| Topic/Title | DC Power Distribution is Coming Soon to a
Building Near You -- Driven by LED Lighting |
|---|---|
| Speaker | Drew Vigen of ALGLO Drew Vigen's experience in electrical engineering ranges from designing high voltage infrastructure to electronic/embedded circuits. He has worked on projects for the Jet Propulsion Laboratory (JPL), Disneyland, and international high-rise hotels. Later he moved into electrical contracting and systems contracting. More recently, he has worked on developing electronics and software for building control and automation, remote video monitoring systems, and photosynthesis monitoring and control. Drew founded ALGLO in 2013. The company is forging technologies disrupting Legacy systems for power distribution in buildings by pioneering Lighting as a System (LaaS). ALGLO is accelerating the shift to DC power systems in buildings. Drew has been active in management of socially responsible projects at Rotary International and Kiwanis International for decades. He is an active environmentalist and considers himself a minimalist at heart. |
| Abstract | We are living in a DC world. Most
electrical and electronic devices used in the
office and at home today, including LED lights,
are powered by Direct Current. Solar
electrical power is DC at the source.
Therefore serious consideration should be given to
the use of DC for electrical wiring in the
future. Drew will discuss the theory and
physical installation of AC and DC electrical
distribution systems, and then explain why Class
II DC wiring will be widely used for electrical
distribution in buildings in the future. He
will review specific examples of past and present
electrical distribution systems for
lighting. Then he will focus on LED lighting
as the application compelling the use of Class II
DC wiring for power distribution in buildings in
the future. |
| Date/Time | 18-November-2015 6:00 to 6:30pm -- Networking 6:30 to 8:30pm -- Business and Program |
| Location | PoK-e-Jo's Smokehouse 2121 West Parmer Lane at Lamplight Village Ave. Austin, Texas |
| Cost | $5.00 minimum cost for the restaurant.
Supper is optional at extra cost.
Reservations are not required. All
interested parties are invited to attend. |
| Reservations | https://meetings.vtools.ieee.org/m/36662 |
| Notes |
Do a friend a favor. Bring your colleagues to grow the Consultants Network.
More information on Consultants Networks
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For more information, contact Mikhail Belkin
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| Topic/Title | IEEE Central Texas Section Life Members Appreciation Dinner |
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| Date/Time | 14-November-2015 06:30PM to 08:30PM |
| Location | Barn Door Restaurant Fire Place Room 8400 N. New Braunfels Ave. San Antonio, Texas United States 78209 |
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| Reservations | https://meetings.vtools.ieee.org/m/36664 For reservations, contact one of the following. Albert Lozano alozano@ieee.org (Chair) Scott Atkinson s.atkinson@ieee.org (Treasurer) |
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| Topic/Title | Next meeting is February 2016 - Please check
back in the February ANALOG |
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Trustworthy Hardware |
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Speaker |
Ramesh Karri Ramesh Karri is a Professor of Electrical and Computer Engineering at Polytechnic Institute of New York University. He has a Ph.D. in Computer Science and Engineering, from the University of California at San Diego. His research interests include trustworthy ICs and processors; High assurance nanoscale architectures and systems; VLSI Design for Test and Trust; Interaction between security and reliability. He has over 150 journal and conference publications in these areas. He has written two invited articles in IEEE Computer on Trustworthy Hardware, an invited article on Digital Logic Design using Memristors in Proceedings of IEEE and an Invited article in IEEE Computer on Reliable Nanoscale Systems. He was the recipient of the Humboldt Fellowship and the National Science Foundation CAREER Award. He is the area director for cyber security of the NY State Center for Advanced Telecommunications Technologies at NYU-Poly; Hardware security lead of the Center for research in interdisciplinary studies in security and privacy -CRISSP (https://crissp.poly.edu/), co-founder of the Trust-Hub (https://trust-hub.org/) and organizes the annual red team blue team event at NYU, the Embedded Systems Challenge (https://www.poly.edu/csaw2012/csaw-embedded). He served on the 2006 DARPA ISAT study on "Trust in Integrated Circuits". He cofounded and served as the chair of the IEEE Computer Society Technical Committee on Nanoscale architectures. He is a cofounder and steering committee member of the IEEE/ACM Symposium on Nanoscale Architectures (NANOARCH). He is the Program Chair (2012) and General Chair (2013) of IEEE Symposium on Hardware Oriented Security and Trust (HOST). He is the Program Co-Chair (2012) and General Co-Chair (2013) of IEEE Symposium on Defect and Fault Tolerant Nano VLSI Systems. He is the General Chair of the 2013 NANOARCH. He serves on several program committees including DAC 2013, ICCD 2012-2013, VTS 2014 and VLSI-SoC 2013. He is an Associate Editor of IEEE Transactions on Information Forensics and Security and an Associate Editor of ACM Journal on Emerging Computing Technologies. He is a Distinguished Lecturer of IEEE Computer Society for 2013-2105. He has presented invited tutorials on various aspects of Trustworthy Hardware including at 2012 VLSI Test Symposium, 2012 International Conference on Computer Design, 2013 IEEE North Atlantic Test Workshop, 2013 Design Automation and Test in Europe. |
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Abstract |
Hardware security and trust is an important
design objective similar to power, performance,
reliability and testability. I will highlight why
hardware security and trust are important
objectives from the economics, security, and
safety perspectives. Important learning outcomes
of this talk include (i) understanding simple
gotchas when traditional DFT, test, and validation
techniques are used (scan chains, JTAG, SoC test,
assertion based validation), (ii) understand how
traditional DFT, test and validation techniques
can be used to improve hardware security and trust
and finally (iii) understand "Design for Trust"
approaches that can provide testability without
compromising security and trust. |
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Date/Time |
November 4th 6:30PM to 8:30PM |
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Cost |
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Reservations |
https://meetings.vtools.ieee.org/meeting_view/list_meeting/36520 |
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Location |
THE ADVISORY BOARD - BUILDING 7, Suite 100 12357-C Riata Trace Pkwy Austin, Texas 78727 |
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Notes |
Joint meeting with CEDA, ComSoc Austin, CAS & SSC and Austin Computer Society |
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Topic/Title |
The New Horizons Mission to Pluto |
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Speaker |
Dr. Scott Weidner of Southwest Research
Institute Mr. Weidner is an Institute Engineer at SwRI and has over 32 years’ experience in research and development engineering. For the last 20 years, he has designed, built, tested, and delivered scientific instruments for numerous spaceflight missions. |
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Abstract |
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Date/Time |
16 November 2015 3:00 – 5:00 pm |
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Location |
The University of Texas at San Antonio, College
of Engineering, BSE Building, Room Number 1.406 |
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Cost |
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Notes |
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Contact Leslie Martinich (lmartinich@ieee.org) for more information about the Austin TMC.
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| Notes |
Contact Leslie Martinich (lmartinich@ieee.org) for more information about WIE.