Abstract: This tutorial-oriented seminar will be an extended encore of a paper presented at the 2011 IEEE Symposium on VLSI Technology in Kyoto, Japan.  We present device and circuit characterization resulting from technology/design co-development to improve the design and manufacture of analog/mixed-signal circuits in processors.  We introduce ID-based MOSFET transconductance measurements and a new measurement of drain saturation margin at realistic analog biasing.  We also describe routinely monitored scribe lane replicas of key analog/mixed-signal passive devices and circuits.  Such measurements enable construction and validation of compact models better suited to analog/mixed-signal needs than those historically tailored for logic design. Finally, we will cover new analog design enhancements in HSPICE resulting from co-development work with Synopsys.