Hardware security and trust is an important design objective similar to power, performance, reliability and testability. I will highlight why hardware security and trust are important objectives from the economics, security, and safety perspectives. Important learning outcomes of this talk include (i) understanding simple gotchas when traditional DFT, test, and validation techniques are used (scan chains, JTAG, SoC test, assertion based validation), (ii) understand how traditional DFT, test and validation techniques can be used to improve hardware security and trust and finally (iii) understand "Design for Trust" approaches that can provide testability without compromising security and trust.